Doowon Lee

According to our database, Doowon Lee authored at least 16 papers between 2009 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Enhancing the Resistive Switching Properties of Transparent HfO2-Based Memristor Devices for Reliable Gasistor Applications.

Taegi Kim, Doowon Lee, Myoungsu Chae, Kyeong-Heon Kim, Hee-Dong Kim

Sensors, October, 2024

2022

Bypassing Multicore Memory Bugs With Coarse-Grained Reconfigurable Logic.

Doowon Lee, Valeria Bertacco

IEEE Trans. Computers, 2022

IZO/ITO Double-Layered Transparent Conductive Oxide for Silicon Heterojunction Solar Cells.

Doowon Lee, Ahreum Lee, Hee-Dong Kim

IEEE Access, 2022

Improved Electrical and Optical Properties of IGZO Transparent Conductive Oxide Due to Microwave Treatment: Application to Silicon Solar Cells.

Myoungsu Chae, Doowon Lee, Sungho Kim, Hee-Dong Kim

IEEE Access, 2022

Improved Resistive Switching Observed in Ti/Zr₃N₂/p-Si Capacitor via Hydrogen Passivation.

Dongjoo Bae, Doowon Lee, Sungho Kim, Hee-Dong Kim

IEEE Access, 2022

2021

Self-Rectifying Characteristics Observed in O-Doped ZrN Resistive Switching Memory Devices Using Schottky Barrier Type Bottom Electrode.

Jinsu Jung, Doowon Lee, Sungho Kim, Hee-Dong Kim

IEEE Access, 2021

2018

Decompose and Conquer: Addressing Evasive Errors in Systems on Chip.

Doowon Lee

PhD thesis, 2018

Low-Overhead Microarchitectural Patching for Multicore Memory Subsystems.

Doowon Lee, Opeoluwa Matthews, Valeria Bertacco

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

2017

MTraceCheck: Validating Non-Deterministic Behavior of Memory Consistency Models in Post-Silicon Validation.

Doowon Lee, Valeria Bertacco

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

AGARSoC: Automated test and coverage-model generation for verification of accelerator-rich SoCs.

Biruk Mammo, Doowon Lee, Harrison Davis, Yijun Hou, Valeria Bertacco

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification.

Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Highly Fault-tolerant NoC Routing with Application-aware Congestion Management.

Doowon Lee, Ritesh Parikh, Valeria Bertacco

Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

NoCVision: A Network-on-Chip Dynamic Visualization Solution.

Vaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco

Proceedings of the 8th International Workshop on Network on Chip Architectures, 2015

2014

Brisk and limited-impact NoC routing reconfiguration.

Doowon Lee, Ritesh Parikh, Valeria Bertacco

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms.

Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2009

VLSI Implementation of a VC-1 Main Profile Decoder for HD Video Applications.

Jinhyun Cho, Doowon Lee, Sang-yong Yoon, Sanggyu Park, Soo-Ik Chae

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009