Donghyun Kim

Affiliations:

Qualcomm, Inc., San Diego, CA, USA
Korea Advanced Institute of Science and Technology, KAIST, School of Electrical and Computer Science, Daejeon, Korea (PhD 2006)

According to our database¹, Donghyun Kim authored at least 24 papers between 2003 and 2015.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2015

Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

2014

19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2011

A Dual-Shader 3-D Graphics Processor With Fast 4-D Vector Inner Product Units and Power-Aware Texture Cache.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2011

2010

A 116 fps/74 mW Heterogeneous 3D-Media Processor for 3-D Display Applications.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2010

2009

A 186-Mvertices/s 161-mW Floating-Point Vertex Processor With Optimized Datapath and Vertex Caches.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

A Floating-Point Unit for 4D Vector Inner Product with Reduced Latency.

[BibT_eX]

[DOI]

Donghyun Kim

Lee-Sup Kim

IEEE Trans. Computers, 2009

Shader-based tessellation to save memory bandwidth in a mobile multimedia processor.

[BibT_eX]

[DOI]

Comput. Graph., 2009

2008

An Area Efficient Early Z -Test Method for 3-D Graphics Rendering Hardware.

[BibT_eX]

[DOI]

Chang-Hyo Yu

Donghyun Kim

Lee-Sup Kim

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A 36 fps SXGA 3-D Display Processor Embedding a Programmable 3-D Graphics Rendering Engine.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2008

Area-efficient pixel rasterization and texture coordinate interpolation.

[BibT_eX]

[DOI]

Donghyun Kim

Lee-Sup Kim

Comput. Graph., 2008

A 3D graphics processor with fast 4D vector inner product units and power aware texture cache.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Tessellation-enabled shader for a bandwidth-limited 3D graphics engine.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

An Energy-Efficient Mobile Vertex Processor With Multithread Expanded VLIW Architecture and Vertex Caches.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

A 36fps SXGA 3D Display Processor with a Programmable 3D Graphics Rendering Engine.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Triangle-Level Depth Filter Method for Bandwidth Reduction in 3D Graphics Hardware.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 186Mvertices/s 161mW Floating-Point Vertex Processor for Mobile Graphics Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

An SoC with 1.3 gtexels/s 3-D graphics full pipeline for consumer applications.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

A 120Mvertices/s multi-threaded VLIW vertex processor for mobile multimedia applications.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems.

[BibT_eX]

[DOI]

Chang-Hyo Yu

Donghyun Kim

Lee-Sup Kim

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware.

[BibT_eX]

[DOI]

Kyusik Chung

Donghyun Kim

Lee-Sup Kim

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

An 11M-triangles/sec 3D graphics clipping engine for triangle primitives.

[BibT_eX]

[DOI]

Jaewan Bae

Donghyun Kim

Lee-Sup Kim

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

An Efficient Fragment Processing Technique in A-Buffer Implementation.

[BibT_eX]

[DOI]

Donghyun Kim

Lee-Sup Kim

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2004

Division-free rasterizer for perspective-correct texture filtering.

[BibT_eX]

Donghyun Kim

Lee-Sup Kim

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

A hardware-like high-level language based environment for 3D graphics architecture exploration.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Donghyun Kim

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