Donghyun Han

According to our database, Donghyun Han authored at least 17 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2024

Signal Shifting-based Reusable Redundant TSV Structure for Infrastructure TSV.

Donghyun Han, Sunghoon Kim, Sungho Kang

Proceedings of the 21st International SoC Design Conference, 2024

2023

TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM.

Youngkwang Lee, Donghyun Han, Sungho Kang

IEEE Trans. Very Large Scale Integr. Syst., April, 2023

Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture.

Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard Architecture.

Sunghoon Kim, Donghyun Han, Seokjun Jang, Sungho Kang

Proceedings of the 20th International SoC Design Conference, 2023

2022

Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery.

Sangmin Park, Minho Cheong, Donghyun Han, Sungho Kang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Multibank Optimized Redundancy Analysis Using Efficient Fault Collection.

Hogyeong Kim, Hayoung Lee, Donghyun Han, Sungho Kang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

ECC-Aware Fast and Reliable Pattern Matching Redundancy Analysis for Highly Reliable Memory.

Donghyun Han, Hayoung Lee, Seungtaek Lee, Sungho Kang

IEEE Access, 2021

Effective Spare Line Allocation Built-in Redundancy Analysis With Base Common Spare for Yield Improvement of 3D Memory.

Donghyun Han, Hayoung Lee, Sungho Kang

IEEE Access, 2021

Area Efficient Built-In Redundancy Analysis using Pre-Solutions with Various Spare Structure.

Youngki Moon, Hyunho Yoo, Donghyun Han, Sungho Kang

Proceedings of the 18th International SoC Design Conference, 2021

A Circular-based TSV Repair Architecture.

Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang

Proceedings of the 18th International SoC Design Conference, 2021

Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC.

Donghyun Han, Youngkwang Lee, Sooryeong Lee, Sungho Kang

Proceedings of the 18th International SoC Design Conference, 2021

2020

W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction.

Hayoung Lee, Donghyun Han, Hogyeong Kim, Sungho Kang

Proceedings of the IEEE International Test Conference in Asia, 2020

Redundancy Analysis Optimization with Clustered Known Solutions for High Speed Repair.

Hayoung Lee, Donghyun Han, Hogyeong Kim, Sungho Kang

Proceedings of the International SoC Design Conference, 2020

2019

Dynamic Built-In Redundancy Analysis for Memory Repair.

Hayoung Lee, Donghyun Han, Seungtaek Lee, Sungho Kang

IEEE Trans. Very Large Scale Integr. Syst., 2019

Redundancy Analysis based on Fault Distribution for Memory with Complex Spares.

Hayoung Lee, Donghyun Han, Seungtaek Lee, Sungho Kang

Proceedings of the 2019 International SoC Design Conference, 2019

2018

3D Memory Formed of Unrepairable Memory Dice and Spare Layer.

Donghyun Han, Hayoung Lee, Seungtaek Lee, Minho Moon, Sungho Kang

Proceedings of the TENCON 2018, 2018

2017

A new repair scheme for TSV-based 3D memory using base die repair cells.

Donghyun Han, Hayoung Lee, Donghyun Kim, Sungho Kang

Proceedings of the International SoC Design Conference, 2017