Dong-Hwan Jin
According to our database1,
Dong-Hwan Jin
authored at least 9 papers
between 2014 and 2024.
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Bibliography
2024
An M-Metric Readout Circuit for MLC Phase-Change Memory With a Comparator-Based Push-Pull Bit-Line Driver.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2024
2020
A Single-Supply CDAC-Based Buffer-Embedding SAR ADC With Skip-Reset Scheme Having Inherent Chopping Capability.
IEEE J. Solid State Circuits, 2020
2019
A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers.
IEEE J. Solid State Circuits, 2019
A Single-Supply Buffer-Embedding SAR ADC with Skip-Reset having Inherent Chopping Capability.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A 18.5 nW 12-bit 1-kS/s Reset-Energy Saving SAR ADC for Bio-Signal Acquisition in 0.18-µm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2016
A Delta-Readout Scheme for Low-Power CMOS Image Sensors With Multi-Column-Parallel SAR ADCs.
IEEE J. Solid State Circuits, 2016
2015
A 15 µm-Pitch, 8.7-ENOB, 13-Mcells/sec Logarithmic Readout Circuit for Multi-Level Cell Phase Change Memory.
IEEE J. Solid State Circuits, 2015
Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
2014
A two-step 5b logarithmic ADC with minimum step-size of 0.1% full-scale for MLC phase-change memory readout.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014