Don E. Ross

According to our database, Don E. Ross authored at least 15 papers between 1988 and 2004.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2004

Memory BIST Using ESP.

Xiaogang Du, Sudhakar M. Reddy, Don E. Ross, Wu-Tung Cheng, Joseph Rayhawk

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

2000

Conversion of small functional test sets of nonscan blocks to scan patterns.

Don E. Ross, Tim Wood, Grady Giles

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1995

Built-in self test for C-testable ILA's.

Murali M. R. Gala, Don E. Ross, Karan L. Watson, Beena Vasudevan, Peter Utama

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Efficient variable ordering and partial representation algorithm.

Jawahar Jain, Dinos Moundanos, James R. Bitner, Jacob A. Abraham, Donald S. Fussell, Don E. Ross

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1994

Linear finite state machine for lD ILAs.

Murali M. R. Gala, Peter Utama, Don E. Ross, Karan L. Watson

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

1993

LFSR based deterministic hardware for at-speed BIST.

Beena Vasudevan, Don E. Ross, Murali M. R. Gala, Karan L. Watson

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Signal probability calculations using partial functional manipulation.

Ravishankar Kodavarti, Don E. Ross

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Testability of one dimensional ILAs under multiple faults.

Murali M. R. Gala, Karan L. Watson, Don E. Ross

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

An Accurate Delay Model for BiCMOS Gates and Off-chip Drivers.

Sherif H. K. Embabi, R. Damodaran, R. Bhagwan, Don E. Ross

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992

The roles of controllability and observability in design for test.

Kenneth M. Butler, Rohit Kapur, M. Ray Mercer, Don E. Ross

Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

Functional Approaches to Generating Orderings for Efficient Symbolic Representations.

M. Ray Mercer, Rohit Kapur, Don E. Ross

Proceedings of the 29th Design Automation Conference, 1992

1991

Exact ordered binary decision diagram size when representing classes of symmetric functions.

Don E. Ross, Kenneth M. Butler, M. Ray Mercer

J. Electron. Test., 1991

Fast functional evaluation of candidate OBDD variable orderings.

Don E. Ross, Kenneth M. Butler, Rohit Kapur, M. Ray Mercer

Proceedings of the conference on European design automation, 1991

Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams.

Kenneth M. Butler, Don E. Ross, Rohit Kapur, M. Ray Mercer

Proceedings of the 28th Design Automation Conference, 1991

1988

CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology.

Rhonda Kay Gaede, Don E. Ross, M. Ray Mercer, Kenneth M. Butler

Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988