Dominique Heller

According to our database1, Dominique Heller authored at least 26 papers between 1993 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Marine Objects Detection Using Deep Learning on Embedded Edge Devices.
Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2022

Optimization of Deep-Learning Detection of Humans in Marine Environment on Edge Devices.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2020
Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV.
Proceedings of the International Workshop on Rapid System Prototyping, 2020

2019
QoS Driven Dynamic Partial Reconfiguration: Tracking Case Study.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

2018
Context/Resource-Aware Mission Planning Based on BNs and Concurrent MDPs for Autonomous UAVs.
Sensors, 2018

A Domain-Specific Language for Autonomic Managers in FPGA Reconfigurable Architectures.
Proceedings of the 2018 IEEE International Conference on Autonomic Computing, 2018

2016
TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA.
ACM Trans. Embed. Comput. Syst., 2016

Task Clustering Approach to Optimize the Scheduling on a Partially Dynamically Reconfigurable FPGAs for image processing algorithms.
Proceedings of the 10th International Conference on Distributed Smart Camera, 2016

2015
Embedded real-time localization of UAV based on an hybrid device.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

2014
A modeling and code generation framework for critical embedded systems design: From Simulink down to VHDL and Ada/C code.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012
A framework for high-level synthesis of heterogeneous MP-SoC.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGA.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
High-Level Synthesis: On the path to ESL design.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
Bitwidth-aware high-level synthesis for designing low-power DSP applications.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis.
J. Signal Process. Syst., 2009

2008
Multiple Word-Length High-Level Synthesis.
EURASIP J. Embed. Syst., 2008

2007
Behavioral description model BDM for design space exploration: A case study of HIS algorithm for MC-CDMA system.
Proceedings of the 15th European Signal Processing Conference, 2007

2006
Design Space Exploration of DSP Applications Based on Behavioral Description Models.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

2005
SystemCmantic: A high level Modelling and Co-Design Framework.
Proceedings of the Forum on specification and Design Languages, 2005

2003
Estimation du parallélisme au niveau système pour l'exploration de l'espace de conception de systèmes enfouis.
Tech. Sci. Informatiques, 2003

1999
An Interactive Modeling and Generation Tool for the Design of Hw/Sw Systems.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
A Programmable Multi-Language Generator for CoDesign.
Proceedings of the 1998 Design, 1998

1996
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems.
Proceedings of the Forth International Workshop on Hardware/Software Codesign, 1996

1993
Functional-level synthesis with VHDL.
Proceedings of the European Design Automation Conference 1993, 1993


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