Dominik Sisejkovic

According to our database, Dominik Sisejkovic authored at least 35 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

QTFlow: Quantitative Timing-Sensitive Information Flow for Security-Aware Hardware Design on RTL.

Lennart M. Reimann, Anschul Prashar, Chiara Ghinami, Rebecca Pelke, Dominik Sisejkovic, Farhad Merchant, Rainer Leupers

CoRR, 2024

2023

A survey of contemporary open-source honeypots, frameworks, and tools.

Niclas Ilg, Paul Duplys, Dominik Sisejkovic, Michael Menth

J. Netw. Comput. Appl., November, 2023

SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors.

Lennart M. Reimann, Jonathan Wiesner, Dominik Sisejkovic, Farhad Merchant, Rainer Leupers

Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic.

Elmira Moussavi, Animesh Singh, Dominik Sisejkovic, Aravind Padma Kumar, Daniyar Kizatov, Sven Ingebrandt, Rainer Leupers, Vivek Pachauri, Farhad Merchant

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Invited Paper: A Holistic Fault Injection Platform for Neuromorphic Hardware.

Felix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Veiras Bolzani Poehls, Rainer Leupers

Proceedings of the 24th IEEE Latin American Test Symposium, 2023

Quantitative Information Flow for Hardware: Advancing the Attack Landscape.

Lennart M. Reimann, Sarp Erdönmez, Dominik Sisejkovic, Rainer Leupers

Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

DeepAttack: A Deep Learning Based Oracle-less Attack on Logic Locking.

Anand Raj, Nikhitha Avula, Pabitra Das, Dominik Sisejkovic, Farhad Merchant, Amit Acharyya

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

AutoLock: Automatic Design of Logic Locking with Evolutionary Computation.

Zeng Wang, Lilas Alrahis, Dominik Sisejkovic, Ozgur Sinanoglu

Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

Fault Injection in Native Logic-in-Memory Computation on Neuromorphic Hardware.

Felix Staudigl, Thorben Fetz, Rebecca Pelke, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Bolzani Pöhls, Rainer Leupers

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Work-in-Progress: A Universal Instrumentation Platform for Non-Volatile Memories.

Felix Staudigl, Mohammed Hossein, Tobias Ziegler, Hazem Al Indari, Rebecca Pelke, Sebastian Siegel, Dirk J. Wouters, Dominik Sisejkovic, Jan Moritz Joseph, Rainer Leupers

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023

2022

Designing trustworthy hardware with logic locking.

Dominik Sisejkovic

PhD thesis, 2022

Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks.

Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Rainer Leupers

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Temperature Independent Readout Circuit for ISFET-Based Sensor Applications.

Elmira Moussavi, Dominik Sisejkovic, Animesh Singh, Daniyar Kizatov, Rainer Leupers, Sven Ingebrandt, Vivek Pachauri, Farhad Merchant

Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

pHGen: A pH-Based Key Generation Mechanism Using ISFETs.

Elmira Moussavi, Dominik Sisejkovic, Fabian Brings, Daniyar Kizatov, Animesh Singh, Xuan Thang Vu, Rainer Leupers, Sven Ingebrandt, Vivek Pachauri, Farhad Merchant

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories.

Felix Staudigl, Hazem Al Indari, Daniel Schön, Dominik Sisejkovic, Farhad Merchant, Jan Moritz Joseph, Vikas Rana, Stephan Menzel, Rainer Leupers

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Designing ML-resilient locking at register-transfer level.

Dominik Sisejkovic, Luca Collini, Benjamin Tan, Christian Pilato, Ramesh Karri, Rainer Leupers

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

X-Fault: Impact of Faults on Binary Neural Networks in Memristor-Crossbar Arrays with Logic-in-Memory Computation.

Felix Staudigl, Karl J. X. Sturm, Maximilian Bartel, Thorben Fetz, Dominik Sisejkovic, Jan Moritz Joseph, Letícia Maria Bolzani Pöhls, Rainer Leupers

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach.

Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Harshit Srivastava, Ahmed Hallawa, Rainer Leupers

ACM J. Emerg. Technol. Comput. Syst., 2021

ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework.

Farhad Merchant, Dominik Sisejkovic, Lennart M. Reimann, Kirthihan Yasotharan, Thomas Grass, Rainer Leupers

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities.

Dominik Sisejkovic, Lennart M. Reimann, Elmira Moussavi, Farhad Merchant, Rainer Leupers

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

Trustworthy Hardware Design with Logic Locking.

Dominik Sisejkovic, Rainer Leupers

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog.

Lennart M. Reimann, Luca Hanel, Dominik Sisejkovic, Farhad Merchant, Rainer Leupers

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Vertical IP Protection of the Next-Generation Devices: Quo Vadis?

Shubham Rai, Siddharth Garg, Christian Pilato, Vladimir Herdt, Elmira Moussavi, Dominik Sisejkovic, Ramesh Karri, Rolf Drechsler, Farhad Merchant, Akash Kumar

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

A secure hardware-software solution based on RISC-V, logic locking and microkernel.

Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Rainer Leupers, Massimiliano Giacometti, Sascha Kegreiß

Proceedings of the SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, 2020

Scaling Logic Locking Schemes to Multi-module Hardware Designs.

Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Rainer Leupers, Sascha Kegreiß

Proceedings of the Architecture of Computing Systems - ARCS 2020, 2020

2019

A Critical Evaluation of the Paradigm Shift in the Design of Logic Encryption Algorithms.

Dominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Volker Kiefer

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

Protecting the Integrity of Processor Cores with Logic Encryption.

Dominik Sisejkovic, Farhad Merchant, Rainer Leupers

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

Control-Lock: Securing Processor Cores Against Software-Controlled Hardware Trojans.

Dominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Sascha Kegreiss

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries.

Dominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Sascha Kegreiss

Proceedings of the 24th IEEE European Test Symposium, 2019

2018

Evolving priority rules for resource constrained project scheduling problem with genetic programming.

Mateja Dumic, Dominik Sisejkovic, Rebeka Coric, Domagoj Jakobovic

Future Gener. Comput. Syst., 2018

A Unifying logic encryption security metric.

Dominik Sisejkovic, Rainer Leupers, Gerd Ascheid, Simon Metzner

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

2017

Immunological algorithms paradigm for construction of Boolean functions with good cryptographic properties.

Stjepan Picek, Dominik Sisejkovic, Domagoj Jakobovic

Eng. Appl. Artif. Intell., 2017

2016

Evolving Cryptographic Pseudorandom Number Generators.

Stjepan Picek, Dominik Sisejkovic, Vladimir Rozic, Bohan Yang, Domagoj Jakobovic, Nele Mentens

Proceedings of the Parallel Problem Solving from Nature - PPSN XIV, 2016

Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware.

Stjepan Picek, Dominik Sisejkovic, Domagoj Jakobovic, Lejla Batina, Bohan Yang, Danilo Sijacic, Nele Mentens

Proceedings of the Progress in Cryptology - AFRICACRYPT 2016, 2016

2014

S-box pipelining using genetic algorithms for high-throughput AES implementations: How fast can we go?

Lejla Batina, Domagoj Jakobovic, Nele Mentens, Stjepan Picek, Antonio de la Piedra, Dominik Sisejkovic

IACR Cryptol. ePrint Arch., 2014