Diya Joseph

Orcid: 0000-0003-2409-4147

According to our database1, Diya Joseph authored at least 6 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
WaSP: Warp Scheduling to Mimic Prefetching in Graphics Workloads.
CoRR, 2024

2023
Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs.
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022
DTexL: Decoupled Raster Pipeline for Texture Locality.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

TCOR: A Tile Cache with Optimal Replacement.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2017
A multipurpose toolkit for teaching DSP in an undergraduate course.
Comput. Appl. Eng. Educ., 2017

2016
An exercise on hardware/software codesign following the RISC model.
Comput. Appl. Eng. Educ., 2016


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