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Divya Arora

Affiliations:
  • Apple Inc., USA
  • Intel Corporation, USA (former)
  • Princeton University, USA (PhD 2007)


According to our database1, Divya Arora authored at least 10 papers between 2005 and 2019.

Collaborative distances:

Timeline

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On csauthors.net:

Bibliography

2019
Secure Composition for Hardware Systems (Dagstuhl Seminar 19301).
[BibTeX]
[DOI]
Divya Arora
,
Ilia Polian
,
Francesco Regazzoni
,
Patrick Schaumont
Dagstuhl Reports, 2019

2014
Formal verification of taint-propagation security properties in a commercial SoC design.
[BibTeX]
[DOI]
Pramod Subramanyan
,
Divya Arora
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2012
INVISIOS: A Lightweight, Minimally Intrusive Secure Execution Environment.
[BibTeX]
[DOI]
Divya Arora
,
Najwa Aaraj
,
Anand Raghunathan
,
Niraj K. Jha
ACM Trans. Embed. Comput. Syst., 2012

2007
Exploring Software Partitions for Fast Security Processing on a Multiprocessor Mobile SoC.
[BibTeX]
[DOI]
Divya Arora
,
Anand Raghunathan
,
Srivaths Ravi
,
Murugan Sankaradass
,
Niraj K. Jha
,
Srimat T. Chakradhar
IEEE Trans. Very Large Scale Integr. Syst., 2007

Architectural Support for Run-Time Validation of Program Data Properties.
[BibTeX]
[DOI]
Divya Arora
,
Srivaths Ravi
,
Anand Raghunathan
,
Niraj K. Jha
IEEE Trans. Very Large Scale Integr. Syst., 2007

2006
Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors.
[BibTeX]
[DOI]
Divya Arora
,
Srivaths Ravi
,
Anand Raghunathan
,
Niraj K. Jha
IEEE Trans. Very Large Scale Integr. Syst., 2006

Software architecture exploration for high-performance security processing on a multiprocessor mobile SoC.
[BibTeX]
[DOI]
Divya Arora
,
Anand Raghunathan
,
Srivaths Ravi
,
Murugan Sankaradass
,
Niraj K. Jha
,
Srimat T. Chakradhar
Proceedings of the 43rd Design Automation Conference, 2006

Architectural support for safe software execution on embedded processors.
[BibTeX]
[DOI]
Divya Arora
,
Anand Raghunathan
,
Srivaths Ravi
,
Niraj K. Jha
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

2005
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring.
[BibTeX]
[DOI]
Divya Arora
,
Srivaths Ravi
,
Anand Raghunathan
,
Niraj K. Jha
Proceedings of the 2005 Design, 2005

Enhancing security through hardware-assisted run-time validation of program data properties.
[BibTeX]
[DOI]
Divya Arora
,
Anand Raghunathan
,
Srivaths Ravi
,
Niraj K. Jha
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005


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