Divya Arora

According to our database, Divya Arora authored at least 11 papers between 2005 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Personalized ranking of products using aspect-based sentiment analysis and Plithogenic sets.

Devendra Kumar Tayal, Sumit Kumar Yadav, Divya Arora

Multim. Tools Appl., 2023

2019

Secure Composition for Hardware Systems (Dagstuhl Seminar 19301).

Divya Arora, Ilia Polian, Francesco Regazzoni, Patrick Schaumont

Dagstuhl Reports, 2019

2014

Formal verification of taint-propagation security properties in a commercial SoC design.

Pramod Subramanyan, Divya Arora

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2012

INVISIOS: A Lightweight, Minimally Intrusive Secure Execution Environment.

Divya Arora, Najwa Aaraj, Anand Raghunathan, Niraj K. Jha

ACM Trans. Embed. Comput. Syst., 2012

2007

Exploring Software Partitions for Fast Security Processing on a Multiprocessor Mobile SoC.

Divya Arora, Anand Raghunathan, Srivaths Ravi, Murugan Sankaradass, Niraj K. Jha, Srimat T. Chakradhar

IEEE Trans. Very Large Scale Integr. Syst., 2007

Architectural Support for Run-Time Validation of Program Data Properties.

Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha

IEEE Trans. Very Large Scale Integr. Syst., 2007

2006

Hardware-Assisted Run-Time Monitoring for Secure Program Execution on Embedded Processors.

Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha

IEEE Trans. Very Large Scale Integr. Syst., 2006

Software architecture exploration for high-performance security processing on a multiprocessor mobile SoC.

Divya Arora, Anand Raghunathan, Srivaths Ravi, Murugan Sankaradass, Niraj K. Jha, Srimat T. Chakradhar

Proceedings of the 43rd Design Automation Conference, 2006

Architectural support for safe software execution on embedded processors.

Divya Arora, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

2005

Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring.

Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha

Proceedings of the 2005 Design, 2005

Enhancing security through hardware-assisted run-time validation of program data properties.

Divya Arora, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha

Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005