Dipankar Shakya

According to our database, Dipankar Shakya authored at least 9 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Waste Factor and Waste Figure: A Unified Theory for Modeling and Analyzing Wasted Power in Radio Access Networks for Improved Sustainability.

Theodore S. Rappaport, Mingjun Ying, Nicola Piovesan, Antonio De Domenico, Dipankar Shakya

CoRR, 2024

Using Waste Factor to Optimize Energy Efficiency in Multiple-Input Single-Output (MISO) and Multiple-Input Multiple-Output (MIMO) Systems.

Mingjun Ying, Dipankar Shakya, Theodore S. Rappaport

CoRR, 2024

A Tutorial on NYUSIM: Sub-Terahertz and Millimeter-Wave Channel Simulator for 5G, 6G, and Beyond.

Hitesh Poddar, Shihao Ju, Dipankar Shakya, Theodore S. Rappaport

IEEE Commun. Surv. Tutorials, 2024

2023

Waste Factor: A New Metric for Evaluating Power Efficiency in any Cascade.

Mingjun Ying, Dipankar Shakya, Hitesh Poddar, Theodore S. Rappaport

Proceedings of the IEEE Global Communications Conference, 2023

A Sub-Terahertz Sliding Correlator Channel Sounder with Absolute Timing using Precision Time Protocol over Wi-Fi.

Dipankar Shakya, Hitesh Poddar, Theodore S. Rappaport

Proceedings of the IEEE Global Communications Conference, 2023

2022

A Power Efficiency Metric for Comparing Energy Consumption in Future Wireless Networks in the Millimeter-Wave and Terahertz Bands.

Ojas Kanhere, Hitesh Poddar, Yunchou Xing, Dipankar Shakya, Shihao Ju, Theodore S. Rappaport

IEEE Wirel. Commun., 2022

Dense Urban Outdoor-Indoor Coverage from 3.5 to 28 GHz.

Dipankar Shakya, Dmitry Chizhik, Jinfeng Du, Reinaldo A. Valenzuela, Theodore S. Rappaport

Proceedings of the IEEE International Conference on Communications, 2022

2021

A Wideband Sliding Correlation Channel Sounder in 65 nm CMOS: Evaluation Board Performance.

Dipankar Shakya, Ting Wu, Michael E. Knox, Theodore S. Rappaport

IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020

A Wideband Sliding Correlator based Channel Sounder in 65 nm CMOS: An Evaluation Board Design.

Dipankar Shakya, Ting Wu, Theodore S. Rappaport

Proceedings of the IEEE Global Communications Conference, 2020