Dipanjan Sengupta

According to our database, Dipanjan Sengupta authored at least 25 papers between 2005 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Procrustean Orthogonal Sparse Hashing.

Mariano Tepper, Dipanjan Sengupta, Theodore L. Willke

CoRR, 2020

2019

Deep Graph Similarity Learning for Brain Data Analysis.

Guixiang Ma, Nesreen K. Ahmed, Theodore L. Willke, Dipanjan Sengupta, Michael W. Cole, Nicholas B. Turk-Browne, Philip S. Yu

Proceedings of the 28th ACM International Conference on Information and Knowledge Management, 2019

2018

NUMA-Caffe: NUMA-Aware Deep Learning Neural Networks.

Probir Roy, Shuaiwen Leon Song, Sriram Krishnamoorthy, Abhinav Vishnu, Dipanjan Sengupta, Xu Liu

ACM Trans. Archit. Code Optim., 2018

Similarity Learning with Higher-Order Proximity for Brain Network Analysis.

Guixiang Ma, Nesreen K. Ahmed, Theodore L. Willke, Dipanjan Sengupta, Michael W. Cole, Nicholas B. Turk-Browne, Philip S. Yu

CoRR, 2018

2017

High-Performance Incremental SVM Learning on Intel^® Xeon Phi™ Processors.

Dipanjan Sengupta, Yida Wang, Narayanan Sundaram, Theodore L. Willke

Proceedings of the High Performance Computing - 32nd International Conference, 2017

EvoGraph: On-the-Fly Efficient Mining of Evolving Graphs on GPU.

Dipanjan Sengupta, Shuaiwen Leon Song

Proceedings of the High Performance Computing - 32nd International Conference, 2017

2016

System design principles for heterogeneous resource management and scheduling in accelerator-based systems.

Dipanjan Sengupta

PhD thesis, 2016

GraphIn: An Online High Performance Incremental Graph Processing Framework.

Dipanjan Sengupta, Narayanan Sundaram, Xia Zhu, Theodore L. Willke, Jeffrey S. Young, Matthew Wolf, Karsten Schwan

Proceedings of the Euro-Par 2016: Parallel Processing, 2016

2015

A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics.

Dipanjan Sengupta, Qi Wang, Haris Volos, Ludmila Cherkasova, Jun Li, Guilherme Magalhaes, Karsten Schwan

Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, Austin, TX, USA, January 31, 2015

GraphReduce: processing large-scale graphs on accelerator-based systems.

Dipanjan Sengupta, Shuaiwen Leon Song, Kapil Agarwal, Karsten Schwan

Proceedings of the International Conference for High Performance Computing, 2015

Constructing stability-based clock gating with hierarchical clustering.

Bao Le, Djordje Maksimovic, Dipanjan Sengupta, Erhan Ergin, Ryan Berryhill, Andreas G. Veneris

Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015

GraphReduce: Large-Scale Graph Analytics on Accelerator-Based HPC Systems.

Dipanjan Sengupta, Kapil Agarwal, Shuaiwen Leon Song, Karsten Schwan

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

2014

Scheduling Multi-tenant Cloud Workloads on Accelerator-Based Systems.

Dipanjan Sengupta, Anshuman Goswami, Karsten Schwan, Krishna Pallavi

Proceedings of the International Conference for High Performance Computing, 2014

2013

Early detection of current hot spots in power gated designs.

Dipanjan Sengupta, Erhan Ergin, Andreas G. Veneris

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Accelerating post silicon debug of deep electrical faults.

Bao Le, Dipanjan Sengupta, Andreas G. Veneris, Zissis Poulos

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Multi-tenancy on GPGPU-based servers.

Dipanjan Sengupta, Raghavendra Belapure, Karsten Schwan

Proceedings of the 7th International Workshop on Virtualization Technologies in Distributed Computing, 2013

Reviving erroneous stability-based clock-gating using partial Max-SAT.

Bao Le, Dipanjan Sengupta, Andreas G. Veneris

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Multi-objective voltage island floorplanning using sequence pair representation.

Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov

Sustain. Comput. Informatics Syst., 2012

Lazy suspect-set computation: fault diagnosis for deep electrical bugs.

Dipanjan Sengupta, Flavio M. de Paula, Alan J. Hu, Andreas G. Veneris, André Ivanov

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

2011

Sequence pair based voltage island floorplanning.

Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov, Res Saleh

Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

2009

Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design.

Dipanjan Sengupta, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008

Supply voltage selection in Voltage Island based SoC design.

Dipanjan Sengupta, Resve A. Saleh

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Application-driven floorplan-aware voltage island design.

Dipanjan Sengupta, Resve A. Saleh

Proceedings of the 45th Design Automation Conference, 2008

2007

Generalized Power-Delay Metrics in Deep Submicron CMOS Designs.

Dipanjan Sengupta, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2005

Power-Delay Metrics Revisited for 90nm CMOS Technology.

Dipanjan Sengupta, Resve A. Saleh

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005