Dionysios I. Reisis

According to our database, Dionysios I. Reisis authored at least 85 papers between 1987 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Neural Network-Based Solar Irradiance Forecast for Edge Computing Devices.

Georgios Venitourakis, Christoforos Vasilakis, Alexandros Tsagkaropoulos, Tzouma Amrou, George E. Konstantoulakis, Panagiotis Golemis, Dionysios I. Reisis

Inf., 2023

2022

Live demonstration of an SDN-reconfigurable, FPGA-based TxRx for an analog-IFoF/mmWave radio access network in an MNO's infrastructure.

Konstantina Kanta, Panagiotis Toumasis, Giannis Giannoulis, Ioannis Stratakos, George Lentaris, Elissaios-Alexios Papatheofanous, Ioanna Mesogiti, Eleni Theodoropoulou, Aristotelis Margaris, Dimitris Syrivelis, E. Kyriazi, Giorgos Brestas, Kostas Tokas, Nikolaos Argyris, Christos Vagionas, Ronis T. Maximidis, Paraskevas Bakopoulos, Agapi Mesodiakaki, Marios Gatzianas, George Kalfas, Kostas Tsagkaris, Nikos Pleros, Dionysios I. Reisis, George L. Lyberopoulos, Dimitrios Apostolopoulos, Dimitrios Soudris, Hercules Avramopoulos

JOCN, 2022

Resources and Power Efficient FPGA Accelerators for Real-Time Image Classification.

Angelos Kyriakos, Elissaios-Alexios Papatheofanous, Charalampos Bezaitis, Dionysios I. Reisis

J. Imaging, 2022

SoC FPGA Acceleration for Semantic Segmentation of Clouds in Satellite Images.

Elissaios-Alexios Papatheofanous, Ph. Tziolos, V. Kalekis, Tzouma Amrou, George E. Konstantoulakis, Georgios Venitourakis, Dionysios I. Reisis

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Combining Fault Tolerance Techniques and COTS SoC Accelerators for Payload Processing in Space.

Vasileios Leon, Elissaios-Alexios Papatheofanous, George Lentaris, Charalampos Bezaitis, Nikolaos Mastorakis, Georgios Bampilis, Dionysios I. Reisis, Dimitrios Soudris

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

End-to-End Real-Time Service Provisioning over a SDN-controllable 60 GHz analog FiWi X-haul for 5G Hot-Spot Networks.

Christos Vagionas, Ronis T. Maximidis, Ioannis Stratakos, Aristotelis Margaris, Agapi Mesodiakaki, Marios Gatzianas, Konstantina Kanta, Panagiotis Toumasis, Giannis Giannoulis, Dimitrios Apostolopoulos, Elissaios-Alexios Papatheofanous, George Lentaris, Dionysios I. Reisis, Dimitrios Soudris, Kostas Tsagkaris, Nikolaos Argyris, Dimitris Syrivelis, Paraskevas Bakopoulos, R. M. Oldenbeuving, C. G. H. Roeloffzen, P. W. L. van Dijk, I. Dimogiannis, A. Kontogiannis, Hercules Avramopoulos, Amalia N. Miliou, Nikos Pleros, George Kalfas

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022

2021

LDPC Hardware Acceleration in 5G Open Radio Access Network Platforms.

Elissaios-Alexios Papatheofanous, Dionysios I. Reisis, Konstantinos Nikitopoulos

IEEE Access, 2021

Towards sharing one FPGA SoC for both low-level PHY and high-level AI/ML computing at the edge.

Ioannis Stratakos, Elissaios-Alexios Papatheofanous, Dimitrios Danopoulos, George Lentaris, Dionysios I. Reisis, Dimitrios Soudris

Proceedings of the IEEE International Mediterranean Conference on Communications and Networking, 2021

The LDPC Challenge in Software-Based 5G New Radio Physical Layer Processing.

Elissaios-Alexios Papatheofanous, Dionysios I. Reisis, Konstantinos Nikitopoulos

Proceedings of the IEEE International Mediterranean Conference on Communications and Networking, 2021

FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks.

Vasileios Leon, Charalampos Bezaitis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis, Elissaios-Alexios Papatheofanous, Angelos Kyriakos, Aubrey Dunne, Arne Samuelsson, David Steenari

Proceedings of the 28th IEEE International Conference on Electronics, 2021

Demonstration of FPGA-based A-IFoF/mmWave transceiver integration in mobile infrastructure for beyond 5G transport.

Panagiotis Toumasis, Konstantina Kanta, Kostas Tokas, Ioannis Stratakos, Elissaios-Alexios Papatheofanous, Giannis Giannoulis, Ioanna Mesogiti, Eleni Theodoropoulou, George L. Lyberopoulos, George Lentaris, Dimitrios Apostolopoulos, Dionysios I. Reisis, Dimitrios Soudris, Hercules Avramopoulos

Proceedings of the European Conference on Optical Communication, 2021

2019

Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution.

Georgios Georgis, George Lentaris, Dionysios I. Reisis

J. Real Time Image Process., 2019

High Performance Accelerator for CNN Applications.

Angelos Kyriakos, Vasileios Kitsakis, Alexandros Louropoulos, Elissaios-Alexios Papatheofanous, Ioannis Patronas, Dionysios I. Reisis

Proceedings of the 29th International Symposium on Power and Timing Modeling, 2019

Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks.

Vasileios Kitsakis, Konstantina Kanta, Ioannis Stratakos, Giannis Giannoulis, Dimitrios Apostolopoulos, George Lentaris, Hercules Avramopoulos, Dimitrios Soudris, Dionysios I. Reisis

Proceedings of the Optical Network Design and Modeling, 2019

2018

Parallel Memory Accessing for FFT Architectures.

Vasileios Kitsakis, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos

J. Signal Process. Syst., 2018

NEPHELE: An End-to-End Scalable and Dynamically Reconfigurable Optical Architecture for Application-Aware SDN Cloud Data Centers.

Paraskevas Bakopoulos, Konstantinos Christodoulopoulos, Giada Landi, Muzzamil Aziz, Eitan Zahavi, Domenico Gallico, Richard Pitwon, Konstantinos Tokas, Ioannis Patronas, Marco Capitani, Christos Spatharakis, Konstantinos Yiannopoulos, Kai Wang, Konstantinos Kontodimas, Ioannis Lazarou, Philipp Wieder, Dionysios I. Reisis, Emmanouel Manos Varvarigos, Matteo Biancani, Hercules Avramopoulos

IEEE Commun. Mag., 2018

Scheduler Accelerator for TDMA Data Centers.

Ioannis Patronas, Nikolaos Gkatzios, Vasileios Kitsakis, Dionysios I. Reisis, Konstantinos Christodoulopoulos, Emmanouel A. Varvarigos

Proceedings of the 26th Euromicro International Conference on Parallel, 2018

NEPHELE: Vertical Integration and Real-Time Demonstration of an Optical Datacenter Network.

Christos Spatharakis, Konstantinos Tokas, Ioannis Patronas, Paraskevas Bakopoulos, Dionysios I. Reisis, Hercules Avramopoulos

Proceedings of the 2018 20th International Conference on Transparent Optical Networks (ICTON), 2018

Parity Based In-Place FFT Architecture for Continuous Flow Applications.

Vasileios Kitsakis, Elissaios-Alexios Papatheofanous, Dionisios I. Reisis, George Lentaris, Dimitrios Soudris

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Parallel Robust Absolute Orientation on FPGA for Vision and Robotics.

Nikolaos Dimou, Manolis I. A. Lourakis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Real Time Demonstration of an End-to-End Optical Datacenter Network with Dynamic Bandwidth Allocation.

Konstantinos Tokas, Christos Spatharakis, Ioannis Patronas, Paraskevas Bakopoulos, Giada Landi, Konstantinos Christodoulopoulos, Marco Capitani, Angelos Kyriakos, Muzzamil Aziz, Richard Pitwon, Domenico Gallico, Dionisios I. Reisis, Emmanouel A. Varvarigos, Eitan Zahavi, Hercules Avramopoulos

Proceedings of the European Conference on Optical Communication, 2018

2017

SDN control framework with dynamic resource assignment for slotted optical datacenter networks.

Giada Landi, Ioannis Patronas, Kostas Kontodimas, Muzzamil Aziz, Kostas Christodoulopoulos, Angelos Kyriakos, Marco Capitani, Amirreza Fazely Hamedani, Dionysios I. Reisis, Emmanouel A. Varvarigos, Paraskevas Bakopoulos, Hercules Avramopoulos

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

Slotted TDMA and optically switched network for disaggregated datacenters.

Konstantinos Tokas, Ioannis Patronas, Christos Spatharakis, Dionysios I. Reisis, Paraskevas Bakopoulos, Hercules Avramopoulos

Proceedings of the 2017 19th International Conference on Transparent Optical Networks (ICTON), 2017

2016

Reduced Complexity Superresolution for Low-Bitrate Video Compression.

Georgios Georgis, George Lentaris, Dionysios I. Reisis

IEEE Trans. Circuits Syst. Video Technol., 2016

An efficient multiple precision floating-point Multiply-Add Fused unit.

Konstantinos Manolopoulos, Dionisios I. Reisis, Vassilios A. Chouliaras

Microelectron. J., 2016

A Co-Design Approach For Rapid Prototyping Of Image Processing On SoC FPGAs.

Ioannis Stratakos, Dionysios I. Reisis, George Lentaris, Konstantinos Maragos, Dimitrios Soudris

Proceedings of the 20th Pan-Hellenic Conference on Informatics, 2016

Switching functions of a data center Top-of-Rack (ToR).

Ioannis Patronas, Angelos Kyriakos, Dionysios I. Reisis

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Agora: Agent and market-based resource management for many-core systems.

Themistoklis Melissaris, Iraklis Anagnostopoulos, Dimitrios Soudris, Dionysios I. Reisis

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A scalable optically-switched datacenter network with multicasting.

Konstantinos Tokas, Christos Spatharakis, Ioannis Kanakis, Nikolaos Iliadis, Paraskevas Bakopoulos, Hercules Avramopoulos, Ioannis Patronas, Nikolaos Liakopoulos, Dionysios I. Reisis

Proceedings of the European Conference on Networks and Communications, 2016

2015

Exact Max-Log MAP Soft-Output Sphere Decoding via Approximate Schnorr-Euchner Enumeration.

Konstantinos Nikitopoulos, Athanasios Karachalios, Dionysios I. Reisis

IEEE Trans. Veh. Technol., 2015

A configurable transmitter architecture & organization for XG-PON OLT/ONU/ONT network elements.

Georgios Menoutis, Andreas Foteas, Nikolaos Liakopoulos, Georgios Georgis, Dionysios I. Reisis, George Synnefakis

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Towards real-time neuronal connectivity assessment: A scalable pipelined parallel generalized partial directed coherence engine.

Georgios Georgis, Georgios Menoutis, Dionysios I. Reisis, Konstantinos S. Tsakalis, Ashfaque Bin Shafique

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014

Neuronal connectivity assessment for epileptic seizure prevention: Parallelizing the generalized partial directed coherence on many-core platforms.

Georgios Georgis, Dionysios I. Reisis, Panagiotis Skordilakis, Konstantinos S. Tsakalis, Ashfaque Bin Shafique, George Chatzikonstantis, George Lentaris

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

A MapReduce framework implementation for Network-on-Chip platforms.

Konstantinos Gyftakis, Iraklis Anagnostopoulos, Dimitrios Soudris, Dionysios I. Reisis

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

XG-PON optical network unit downstream FEC design based on truncated Reed-Solomon code.

Georgios Georgis, Charalambos Tzeranis, Dionysios I. Reisis, George Synnefakis

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Using high-level synthesis to build memory and datapath optimized DSP accelerators.

Dionysios Diamantopoulos, George Economakos, Dionysios I. Reisis

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

PANDA: asymmetric passive optical network for xDSL and FTTH access.

Konstantinos Yiannopoulos, Emmanouel A. Varvarigos, Dimitrios Klonidis, Ioannis Tomkos, Maria Spyropoulou, Ioannis Lazarou, Paraskevas Bakopoulos, Hercules Avramopoulos, George Heliotis, L.-P. Dimos, George Agapiou, Georgios Papastergiou, Ilias Koukouvinos, A. Orfanoudakis, Thanasis Oikonomou, Dimitrios Kritharidis, Spyridon Spyridakis, M. Dalakidis, G. Synnefakis, Dionysios I. Reisis, Georgios I. Papadimitriou, Panagiotis G. Sarigiannidis, Christos Liaskos

Proceedings of the 17th Panhellenic Conference on Informatics, 2013

Single-image super-resolution using low complexity adaptive iterative back-projection.

Georgios Georgis, George Lentaris, Dionysios I. Reisis

Proceedings of the 18th International Conference on Digital Signal Processing, 2013

2012

Design and Comparison of FFT VLSI Architectures for SoC Telecom Applications with Different Flexibility, Speed and Complexity Trade-Offs.

Sergio Saponara, Massimo Rovini, Luca Fanucci, Athanasios Karachalios, George Lentaris, Dionysios I. Reisis

Circuits Syst. Signal Process., 2012

Conflict free, parallel memory access for radix-2 FFT processors.

Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis, Ioannis Zokas

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Signal processing for deep-sea observatories with reconfigurable hardware.

Konstantinos Manolopoulos, A. Belias, Georgios Georgis, Dionysios I. Reisis, E. G. Anasontzis

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011

A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers.

Konstantinos S. Tsakalis, Nikolaos Vlassopoulos, George Lentaris, Dionysios I. Reisis

Circuits Syst. Signal Process., 2011

An efficient multiple precision floating-point multiplier.

Konstantinos Manolopoulos, Dionisios I. Reisis, Vassilios A. Chouliaras

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Study of interpolation filters for motion estimation with application in H.264/AVC encoders.

Georgios Georgis, George Lentaris, Dionysios I. Reisis

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Configurable baseband digital transceiver for Gbps wireless 60 GHz communications.

Dionysios Diamantopoulos, Panagiotis Galiatsatos, Athanasios Karachalios, George Lentaris, Dionisios I. Reisis, Dimitrios Soudris

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Customizing a VLIW Chip Multiprocessor for Motion Estimation Algorithms.

Vassilios A. Chouliaras, George Lentaris, Dionisios I. Reisis, David Stevens

Proceedings of the ARCS 2011, 2011

2010

Fully Systolic FFT Architecture for Giga-sample Applications.

Konstantinos Babionitakis, Vassilios A. Chouliaras, Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos

J. Signal Process. Syst., 2010

A Graphics Parallel Memory Organization Exploiting Request Correlations.

George Lentaris, Dionysios I. Reisis

IEEE Trans. Computers, 2010

A continuous-flow, Variable-Length FFT SDF architecture.

Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis

Proceedings of the 17th IEEE International Conference on Electronics, 2010

An efficient dual-mode floating-point Multiply-Add Fused Unit.

Konstantinos Manolopoulos, Dionysios I. Reisis, Vassilios A. Chouliaras

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

A configurable length, Fused Multiply-Add floating point unit for a VLIW processor.

Vassilios A. Chouliaras, Konstantinos Manolopoulos, Dionysios I. Reisis

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Evaluating the performance of a configurable, extensible VLIW processor in FFT execution.

David Stevens, Nick Glynn, Panagiotis Galiatsatos, Vassilios A. Chouliaras, Dionysios I. Reisis

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Programmable Motion Estimation architecture.

Anargyros Drolapas, George Lentaris, Dionysios I. Reisis

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Efficient cascaded VLSI FFT architecture for OFDM systems.

Vassilios A. Chouliaras, Panagiotis Galiatsatos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

Conflict-Free Parallel Memory Accessing Techniques for FFT Architectures.

Dionysios I. Reisis, Nikolaos Vlassopoulos

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A real-time H.264/AVC VLSI encoder architecture.

Konstantinos Babionitakis, Gregory Doumenis, George Georgakarakos, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Ioannis Sifnaios, Nikolaos Vlassopoulos

J. Real Time Image Process., 2008

A real-time motion estimation FPGA architecture.

Konstantinos Babionitakis, Gregory Doumenis, George Georgakarakos, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Ioannis Sifnaios, Nikolaos Vlassopoulos

J. Real Time Image Process., 2008

Customization of an embedded RISC CPU with SIMD extensions for video encoding: A case study.

Vassilios A. Chouliaras, Vincent M. Dwyer, Shahrukh Agha, José L. Núñez-Yáñez, Dionysios I. Reisis, Konstantinos Nakos, Konstantinos Manolopoulos

Integr., 2008

Addressing technique for parallel memory accessing in radix-2 FFT processors.

Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

High Performance 16K, 64K, 256K complex points VLSI Systolic FFT Architectures.

Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Vassilios A. Chouliaras

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006

An approach for efficient design of digital amplifiers.

Nikolaos Vlassopoulos, Dionysios I. Reisis, George Lentaris, George S. Tombras, Evangelos A. Prosalentis, N. Ritas, Konstantinos S. Tsakalis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Address Generation Techniques for Conflict Free Parallel Memory Accessing in FFT Architectures.

Dionysios I. Reisis, Nikolaos Vlassopoulos

Proceedings of the 13th IEEE International Conference on Electronics, 2006

A High Performance VLSI FFT Architecture.

Konstantinos Babionitakis, Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Vassilios A. Chouliaras

Proceedings of the 13th IEEE International Conference on Electronics, 2006

An Efficient H.264 VLSI Advanced Video Encoder.

Konstantinos Babionitakis, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Gregory Doumenis, George Georgakarakos, John Sifnaios

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2003

Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators.

A. Chorevas, Dionysios I. Reisis

J. VLSI Signal Process., 2003

Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks.

Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis

Telecommun. Syst., 2003

A VLSI architecture for minimizing the transmission power in OFDM transceivers.

Konstantinos Babionitakis, Y. Dagres, Konstantinos Nakos, Dionysios I. Reisis

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip.

George Lykakis, N. Mouratidis, Kyriakos Vlachos, Nikos A. Nikolaou, Stylianos Perissakis, G. Sourdis, George E. Konstantoulakis, Dionisios N. Pnevmatikatos, Dionisios I. Reisis

Proceedings of the 2003 Design, 2003

Verification of a Complex SoC: The PRO3 Case-Study.

Fotis Andritsopoulos, C. Charopoulos, Gregory Doumenis, Fotis Karoubalis, Yannis Mitsos, F. Petreas, Ioanna Theologitou, Stylianos Perissakis, Dionisios I. Reisis

Proceedings of the 2003 Design, 2003

2001

A Parallel VLSI Video/Communication Controller.

Gregory Doumenis, George E. Konstantoulakis, G. Korinthios, George Lykakis, Dionisios I. Reisis, G. Synnefakis

J. VLSI Signal Process., 2001

1999

An efficient component (IN-RAM) for buffer management and multi-protocol implementation in ATM systems.

Gregory Doumenis, George E. Konstantoulakis, G. Korinthios, George Lykakis, Dionysios I. Reisis, G. Synnefakis

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Design and Implementation of a Low-Cost Highly-Modular ATM Access Node Switch.

George Lykakis, Kostas Pramataris, Dionisios I. Reisis, George I. Stassinopoulos, G. Synnefakis, Euripides Zervanos

Proceedings of the 17th IASTED International Conference on Applied Informatics, 1999

Developing an Efficient Model for Evaluating WWW Search Engines.

I. Despotopoulos, G. Korinthios, I. Nasios, Dionysios I. Reisis

Proceedings of the 17th IASTED International Conference on Applied Informatics, 1999

1996

An efficient shared-buffer for high speed ATM networks.

George E. Konstantoulakis, Kostas Pramataris, Dionisios I. Reisis, Georgios I. Stassinopoulos

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

An array based system for real time buffer management.

George E. Konstantoulakis, Dionysios I. Reisis

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

An efficient digital FIR filter design for 64 QAM.

A. Chorevas, Dionisios I. Reisis, E. G. Metaxakis

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1994

An Efficient Network Analyser Based on Linear Array Architecture.

S. N. Metallinos, Dionisios I. Reisis, George I. Stassinopoulos

Parallel Algorithms Appl., 1994

1993

Parallel Computations on Reconfigurable Meshes.

Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout

IEEE Trans. Computers, 1993

1992

An Efficient Convex Hull Computation on the Reconfigurable Mesh.

Dionisios I. Reisis

Proceedings of the 6th International Parallel Processing Symposium, 1992

1991

Improved Graph Computations on the Reconfigurable Mesh.

Dionisios I. Reisis

Proceedings of the Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30, 1991

1989

Image Computations on Meshes with Multiple Broadcast.

Viktor K. Prasanna, Dionisios I. Reisis

IEEE Trans. Pattern Anal. Mach. Intell., 1989

1988

Data Movement Operations and Applications on Reconfigurable VLSI Arrays.

Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout

Proceedings of the International Conference on Parallel Processing, 1988

Image computations on reconfigurable VLSI arrays.

Russ Miller, V. K. Prasanna Kumar, Dionysios I. Reisis, Quentin F. Stout

Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition, 1988

1987

VLSI Arrays with Reconfigurable Buses.

Dionisios I. Reisis, Viktor K. Prasanna

Proceedings of the Supercomputing, 1987

Parallel Image Processing On Enhanced Arrays.

Dionisios I. Reisis, Viktor K. Prasanna

Proceedings of the International Conference on Parallel Processing, 1987