Dionysios Filippas
Orcid: 0000-0002-4729-3336
According to our database1,
Dionysios Filippas
authored at least 13 papers
between 2022 and 2024.
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2024
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2024
Floating-Point Multiply-Add with Approximate Normalization for Low-Cost Matrix Engines.
CoRR, 2024
A High-Level Synthesis Library for Synthesizing Efficient and Functional-Safe CNN Dataflow Accelerators.
IEEE Access, 2024
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
IEEE Trans. Very Large Scale Integr. Syst., November, 2023
IEEE Trans. Very Large Scale Integr. Syst., March, 2023
Microprocess. Microsystems, 2023
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
LeapConv: An Energy-Efficient Streaming Convolution Engine with Reconfigurable Stride.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
FusedGCN: A Systolic Three-Matrix Multiplication Architecture for Graph Convolutional Networks.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022