Dionysios Diamantopoulos

Miquel Moretó

Future Gener. Comput. Syst., December, 2023

Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures.

[BibT_eX]

[DOI]

François Abel

Beat Weiss

Dietmar Fey

IEEE Comput. Archit. Lett., 2023

DOSA: Organic Compilation for Neural Network Inference on Distributed FPGAs.

[BibT_eX]

[DOI]

François Abel

Beat Weiss

Dietmar Fey

Proceedings of the IEEE International Conference on Edge Computing and Communications, 2023

Composability of Cloud Accelerators in Virtual World Simulations.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Cloud Computing, 2023

2022

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2022

Exploiting HBM on FPGAs for Data Processing.

[BibT_eX]

[DOI]

Runbin Shi

Kaan Kara

Dimitris Syrivelis

Gustavo Alonso

ACM Trans. Reconfigurable Technol. Syst., 2022

LEAPER: Modeling Cloud FPGA-based Systems via Transfer Learning.

[BibT_eX]

[DOI]

CoRR, 2022

Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms.

[BibT_eX]

[DOI]

Argyris Kokkinis

IEEE Comput. Archit. Lett., 2022

LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning.

[BibT_eX]

[DOI]

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Dynamic Heap Management in High-Level Synthesis for Many-Accelerator Architectures.

[BibT_eX]

[DOI]

Argyris Kokkinis

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

2021

FPGA-Based Near-Memory Acceleration of Modern Data-Intensive Applications.

[BibT_eX]

[DOI]

Mohammed Alser

Damla Senol Cali

Juan Gómez-Luna

Henk Corporaal

Onur Mutlu

IEEE Micro, 2021

NERO: Accelerating Weather Prediction using Near-Memory Reconfigurable Fabric.

[BibT_eX]

[DOI]

CoRR, 2021

An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment.

[BibT_eX]

[DOI]

Abbas Haghi

Santiago Marco-Sola

Lluc Alvarez

Miquel Moretó

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Modeling FPGA-Based Systems via Few-Shot Learning.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Heterogeneous Computing Systems for Complex Scientific Discovery Workflows.

[BibT_eX]

[DOI]

Constantinos Evangelinos

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

A Case for Function-as-a-Service with Disaggregated FPGAs.

[BibT_eX]

[DOI]

François Abel

Proceedings of the 14th IEEE International Conference on Cloud Computing, 2021

Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Cloud Computing, 2021

2020

PHRYCTORIA: A Messaging System for Transprecision OpenCAPI-attached FPGA Accelerators.

[BibT_eX]

[DOI]

Mitra Purandare

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

NERO: A Near High-Bandwidth Memory Stencil Accelerator for Weather Prediction Modeling.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

High Bandwidth Memory on FPGAs: A Data Analytics Perspective.

[BibT_eX]

[DOI]

Kaan Kara

Dimitris Syrivelis

Gustavo Alonso

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA.

[BibT_eX]

[DOI]

Abbas Haghi

Lluc Alvarez

Jordà Polo

Miquel Moretó

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Agile Autotuning of a Transprecision Tensor Accelerator Overlay for TVM Compiler Stack.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs.

[BibT_eX]

[DOI]

A. Cristiano I. Malossi

Luca Benini

Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020

2019

Low Precision Processing for High Order Stencil Computations.

[BibT_eX]

[DOI]

Sander Stuijk

Henk Corporaal

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

NARMADA: Near-Memory Horizontal Diffusion Accelerator for Scalable Stencil Computations.

[BibT_eX]

[DOI]

Sander Stuijk

Henk Corporaal

Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

Coherently Attached Programmable Near-Memory Acceleration Platform and its application to Stencil Processing.

[BibT_eX]

[DOI]

Jan van Lunteren

Ronald P. Luijten

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

HelmGemm: Managing GPUs and FPGAs for Transprecision GEMM Workloads in Containerized Environments.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

Extending the POWER Architecture with Transprecision Co-Processors.

[BibT_eX]

[DOI]

Heiner Giefers

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A System-Level Transprecision FPGA Accelerator for BLSTM Using On-chip Memory Reshaping.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2018

ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case.

[BibT_eX]

[DOI]

Heiner Giefers

Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2017

An FPGA-based Integrated MapReduce Accelerator Platform.

[BibT_eX]

[DOI]

Christoforos Kachris

Georgios Ch. Sirakoulis

J. Signal Process. Syst., 2017

On supporting rapid prototyping of embedded systems with reconfigurable architectures.

[BibT_eX]

[DOI]

Ioannis Koutras

Konstantinos Maragos

Integr., 2017

2015

GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management).

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2015

Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2015

High-level synthesizable dataflow MapReduce accelerator for FPGA-coupled data centers.

[BibT_eX]

[DOI]

Christoforos Kachris

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools.

[BibT_eX]

[DOI]

Konstantinos Maragos

Shalina Percy Delicia

Jürgen Becker

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms.

[BibT_eX]

[DOI]

Ioannis Stamoulias

Konstantinos Maragos

Manolis I. A. Lourakis

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2014

A framework for rapid evaluation of heterogeneous 3-D NoC architectures.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2014

SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots.

[BibT_eX]

[DOI]

Ioannis Kostavelis

Lazaros Nalpantidis

Evangelos Boukas

Ioannis Stamoulias

Antonios Gasteratos

J. Field Robotics, 2014

Using high-level synthesis to build memory and datapath optimized DSP accelerators.

[BibT_eX]

[DOI]

Dionysios I. Reisis

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

A new design paradigm for floating point DSP applications based on ESL/HLS and FPGAs?

[BibT_eX]

[DOI]

Christoforos E. Economakos

Proceedings of the IEEE International Symposium on Signal Processing and Information Technology, 2013

HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012

A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems.

[BibT_eX]

[DOI]

VLSI Design, 2012

FPGA-based path-planning of high mobility rover for future planetary missions.

[BibT_eX]

[DOI]

G. Stamoulias

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Hardware implementation of stereo correspondence algorithm for the ExoMars mission.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

SPARTAN project: On profiling computer vision algorithms for rover navigation.

[BibT_eX]

[DOI]

Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012

2011

Thermal optimization for micro-architectures through selective block replication.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications.

[BibT_eX]

[DOI]

Iraklis Anagnostopoulos

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Design and experimentation with low-power morphable multipliers.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Configurable baseband digital transceiver for Gbps wireless 60 GHz communications.

[BibT_eX]

[DOI]

Panagiotis Galiatsatos

Athanasios Karachalios

Dionisios I. Reisis