Dinh Van Luan
Orcid: 0000-0002-5522-1615
According to our database1,
Dinh Van Luan
authored at least 3 papers
between 2017 and 2019.
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Bibliography
2019
A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation.
ACM Trans. Reconfigurable Technol. Syst., 2019
2018
A New FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation of Operating Condition Variation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Proceedings of the International SoC Design Conference, 2017