Dinesh Padole

Orcid: 0000-0001-8308-5393

According to our database1, Dinesh Padole authored at least 8 papers between 2005 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Design of Basic Logic Gates Using Carbon Nano Tube Field Effect Transistor and Calculation of Figure of Merit.
Proceedings of the 7th International Conference on Emerging Trends in Engineering & Technology, 2015

Configuration Memory Based Dynamic Coarse Grained Reconfigurable Multicore Architecture for 8 Point FFT.
Proceedings of the 7th International Conference on Emerging Trends in Engineering & Technology, 2015

2012
Design of Cache Controller for Multi-core Systems using Multilevel Scheduling Method.
Proceedings of the 2012 Fifth International Conference on Emerging Trends in Engineering and Technology, 2012

2011
Novel Multi-core Perspective Approach for Automotive System with Virtual Instrumentation.
Proceedings of the 4th International Conference on Emerging Trends in Engineering and Technology, 2011

2010
Design of Shared Resource Based Multicore Embedded Controller Using LEON Processor.
Proceedings of the 3rd International Conference on Emerging Trends in Engineering and Technology, 2010

2008
Fuzzy Logic Arbiter for Shared Bus Multiprocessor System: A Design Approach.
Proceedings of the First International Conference on Emerging Trends in Engineering and Technology, 2008

Dynamic Lottery Bus Arbiter for Shared Bus System on Chip: A Design Approach with VHDL.
Proceedings of the First International Conference on Emerging Trends in Engineering and Technology, 2008

2005
Genetic Modeling: Solution to Channel Assignment Problem.
Proceedings of the Knowledge-Based Intelligent Information and Engineering Systems, 2005


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