Dinesh Ganta

According to our database1, Dinesh Ganta authored at least 9 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A Configurable and Lightweight Timing Monitor for Fault Attack Detection.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2014
Circuit-level approach to improve the temperature reliability of Bi-stable PUFs.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Study of IC aging on ring oscillator physical unclonable functions.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013
Design and benchmarking of an ASIC with five SHA-3 finalist candidates.
Microprocess. Microsystems, 2013

Easy-to-build Arbiter Physical Unclonable Function with enhanced challenge/response set.
Proceedings of the International Symposium on Quality Electronic Design, 2013

A novel statistical and circuit-based technique for counterfeit detection in existing ICs.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

2012
ASIC implementations of five SHA-3 finalists.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
A Highly Stable Leakage-Based Silicon Physical Unclonable Functions.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Pre-silicon Characterization of NIST SHA-3 Final Round Candidates.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011


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