Dinesh Ganesan

According to our database, Dinesh Ganesan authored at least 7 papers between 2007 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Graph-Based Circuit Simulator for Switched Capacitor Circuits.

Dinesh Ganesan, Binsu J. Kailath

IEEE Des. Test, 2022

2021

Tree/link method for transfer function and stability analysis of switched-capacitor circuits.

Dinesh Ganesan, Binsu J. Kailath

Int. J. Circuit Theory Appl., 2021

2016

Switched-capacitor circuit simulator in Q-V domain including nonidealities.

G. Muralidhar, Dinesh Ganesan, Binsu J. Kailath

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016

Improved alias rejection using interleaved CIC decimation filter.

S. S. Karthikeyan, Dinesh Ganesan, Binsu J. Kailath

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

QSCsim - Charge Based Switched Capacitor Simulator.

Binsu J. Kailath, Dinesh Ganesan

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

2008

Finite-Point Gate Model for Fast Timing and Power Analysis.

Dinesh Ganesan, Alexander V. Mitev, Janet Meiling Wang, Yu Cao

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

A robust finite-point based gate model considering process variations.

Alexander V. Mitev, Dinesh Ganesan, Dheepan Shanmugasundaram, Yu Cao, Janet Meiling Wang

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007