Dimitrios Stathis

According to our database, Dimitrios Stathis authored at least 31 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Modeling Cycle-to-Cycle Variation in Memristors for In-Situ Unsupervised Trace-STDP Learning.

Jiawei Xu, Yi Zheng, Feng Li, Dimitrios Stathis, Ruisi Shen, Haoming Chu, Anders Lansner, Lirong Zheng, Zhuo Zou, Ahmed Hemani

IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case Study.

Pudi Dhilleswararao, Yu Yang, Dimitrios Stathis, Sunil Kumar Prajapati, Srinivas Boppu, Ahmed Hemani, Linga Reddy Cenkeramaddi

IEEE Access, 2024

Exploration of Custom Floating-Point Formats: A Systematic Approach.

Saba Yousefzadeh, Yu Yang, Astile Peter, Dimitrios Stathis, Ahmed Hemani

Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

FPGA-Based HPC for Associative Memory System.

Deyu Wang, Yuning Wang, Yu Yang, Dimitrios Stathis, Ahmed Hemani, Anders Lansner, Jiawei Xu, Li-Rong Zheng, Zhuo Zou

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning.

Deyu Wang, Jiawei Xu, Feng Li, Lianhao Zhang, Chengwei Cao, Dimitrios Stathis, Anders Lansner, Ahmed Hemani, Lirong Zheng, Zhuo Zou

IEEE Trans. Biomed. Circuits Syst., October, 2023

Clock tree generation by abutment in synchoros VLSI design.

Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani

Microprocess. Microsystems, 2023

DRRA-based Reconfigurable Architecture for Mixed-Radix FFT.

Reeshita Kallapu, Dimitrios Stathis, Srinivas Boppu, Ahmed Hemani

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Optoelectronic Memristor Model for Optical Synaptic Circuit of Spiking Neural Networks.

Jiawei Xu, Yi Zheng, Chenxu Sheng, Yichen Cai, Dimitrios Stathis, Ruisi Shen, Lirong Zheng, Zhuo Zou, Laigui Hu, Ahmed Hemani

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms.

Seyed Ahmad Mirsalari, Saba Yousefzadeh, Giuseppe Tagliavini, Dimitrios Stathis, Ahmed Hemani

Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022

MOHAQ: Multi-Objective Hardware-Aware Quantization of recurrent neural networks.

Nesma M. Rezk, Tomas Nordström, Dimitrios Stathis, Zain Ul-Abdin, Eren Erdal Aksoy, Ahmed Hemani

J. Syst. Archit., 2022

Reducing the Configuration Overhead of the Distributed Two-level Control System.

Yu Yang, Dimitrios Stathis, Ahmed Hemani

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Multi-objective Recurrent Neural Networks Optimization for the Edge - a Quantization-based Approach.

Nesma M. Rezk, Tomas Nordström, Dimitrios Stathis, Zain Ul-Abdin, Eren Erdal Aksoy, Ahmed Hemani

CoRR, 2021

Design and Implementation of Optimized Register File for Streaming Applications.

Ayazulla Khan Patan, Dimitrios Stathis, Pudi Dhilleswararao, Yu Yang, Srinivas Boppu, Ahmed Hemani

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

Synthesis of predictable global NoC by abutment in synchoros VLSI design.

Jordi Altayó González, Dimitrios Stathis, Ahmed Hemani

Proceedings of the NOCS '21: International Symposium on Networks-on-Chip, 2021

Approximate computation of post-synaptic spikes reduces bandwidth to synaptic storage in a model of cortex.

Dimitrios Stathis, Yu Yang, Ahmed Hemani, Anders Lansner

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

A Memristor Model with Concise Window Function for Spiking Brain-Inspired Computation.

Jiawei Xu, Deyu Wang, Feng Li, Lianhao Zhang, Dimitrios Stathis, Yu Yang, Yi Jin, Anders Lansner, Ahmed Hemani, Zhuo Zou, Li-Rong Zheng

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020

eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex.

Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn

J. Signal Process. Syst., 2020

NACU: A Non-Linear Arithmetic Unit for Neural Networks.

Guido Baccelli, Dimitrios Stathis, Ahmed Hemani, Maurizio Martina

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex.

Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn

CoRR, 2019

Regional Clock Tree Generation by Abutment in Synchoros VLSI Design.

Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani

CoRR, 2019

Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps.

Dimitrios Stathis, Yu Yang, Saurabh Tewari, Ahmed Hemani, Kolin Paul, Manfred G. Grabherr, Rafi Ahmad

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018

Massively Parallel Analog Computing: Ariadne's Thread Was Made of Memristors.

Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis

IEEE Trans. Emerg. Top. Comput., 2018

RiBoSOM: rapid bacterial genome identification using self-organizing map implemented on the synchoros SiLago platform.

Yu Yang, Dimitrios Stathis, Prashant Sharma, Kolin Paul, Ahmed Hemani, Manfred G. Grabherr, Rafi Ahmad

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

2017

Can a reconfigurable architecture beat ASIC as a CNN accelerator?

Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs.

Yu Yang, Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis

Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms, 2017

2016

Alternative Architectures Toward Reliable Memristive Crossbar Memories.

Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis, Said Hamdioui

IEEE Trans. Very Large Scale Integr. Syst., 2016

2015

Live demonstration: XbarSim: An educational simulation tool for memristive crossbar-based circuits.

Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

XbarSim: An educational simulation tool for memristive crossbar-based circuits.

Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

Solving AI problems with memristors: A case study for optimal "bin packing".

Dimitrios Stathis, Ioannis Vourkas, Georgios Ch. Sirakoulis

Proceedings of the 18th Panhellenic Conference on Informatics, 2014

Shortest Path Computing Using Memristor-Based Circuits and Cellular Automata.

Dimitrios Stathis, Ioannis Vourkas, Georgios Ch. Sirakoulis

Proceedings of the Cellular Automata, 2014

2013

Improved read voltage margins with alternative topologies for memristor-based crossbar memories.

Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013