Dimitrios M. Schinianakis

Orcid: 0000-0001-5228-6715

According to our database1, Dimitrios M. Schinianakis authored at least 18 papers between 2006 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Smart Devices Security Enhancement via Power Supply Monitoring.
Future Internet, 2020

2019
Security Considerations in 5G Networks: A Slice-Aware Trust Zone Approach.
Proceedings of the 2019 IEEE Wireless Communications and Networking Conference, 2019

Monitoring Supply Current Thresholds for Smart Device's Security Enhancement.
Proceedings of the 15th International Conference on Distributed Computing in Sensor Systems, 2019

2016
A High-Speed FPGA Implementation of an RSD-Based ECC Processor.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2014
Multifunction Residue Architectures for Cryptography.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

An RNS barrett modular multiplication architecture.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Versatile architectures for cryptographic systems
PhD thesis, 2013

Efficient RNS Implementation of Elliptic Curve Point Multiplication Over ${\rm GF}(p)$.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Hardware-fault attack handling in RNS-based Montgomery multipliers.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

An RNS modular multiplication algorithm.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
GF(2<sup>n</sup>) Montgomery multiplication using Polynomial Residue Arithmetic.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Cipher Block Based Authentication Module: a Hardware Design Perspective.
J. Circuits Syst. Comput., 2011

A RNS Montgomery multiplication architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2009
An RNS Implementation of an F<sub>p</sub> Elliptic Curve Point Multiplier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Design of a balanced 8-modulus RNS.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

Elliptic Curve Point Multiplication in GF(2<sup>n</sup>) using Polynomial Residue Arithmetic.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
Novel Hardware Implementation of the Cipher Message Authentication Code.
J. Comput. Networks Commun., 2008

2006
An RNS architecture of an F<sub>p</sub> elliptic curve point multiplier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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