Dimitri A. Antoniadis
Affiliations:- Massachusetts Institute of Technology, Cambridge, USA
According to our database1,
Dimitri A. Antoniadis
authored at least 28 papers
between 1985 and 2020.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1990, "For contributions to the fabrication process modeling and simulation and to field-effect quantum transport devices.".
Timeline
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Bibliography
2020
Monolithically Integrated GaN+CMOS Logic Circuits Design and Electro-Thermal Analysis for High-Voltage Applications.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020
2019
Implementation of InGaAs-OI Passive Devices and Its Application to 5G Millimeter-Wave Phase Shifter.
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019
2016
Compact Model Parameter Extraction Using Bayesian Inference, Incomplete New Measurements, and Optimal Bias Selection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
2015
EP1: Moore's law challenges below 10nm: Technology, design and economic implications.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Statistical library characterization using belief propagation across multiple technology nodes.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Efficient performance estimation with very small sample size via physical subspace projection and maximum a posteriori estimation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Remembrance of Transistors Past: Compact Model Parameter Extraction Using Bayesian Inference and Incomplete New Measurements.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
Proceedings of the Design, Automation and Test in Europe, 2013
An ultra-compact virtual source FET model for deeply-scaled devices: Parameter extraction and validation for standard cell libraries and digital circuits.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012
2010
Proceedings of the Design, Automation and Test in Europe, 2010
2006
Continuous MOSFET performance increase with device scaling: The role of strain and channel material innovations.
IBM J. Res. Dev., 2006
2004
Full-chip subthreshold leakage power prediction and reduction techniques for sub-0.18-μm CMOS.
IEEE J. Solid State Circuits, 2004
2002
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage.
IEEE J. Solid State Circuits, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
2001
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001
1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
Simulation of semiconductor devices using a Galerkin/spherical harmonic expansion approach to solving the coupled Poisson-Boltzmann system.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Proceedings of the 33st Conference on Design Automation, 1996
1993
Computation of drain and substrate currents in ultra-short-channel nMOSFET's using the hydrodynamic model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
1991
Proc. IEEE, 1991
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
1985
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985