Dimin Niu
Orcid: 0000-0001-8440-3875
According to our database1,
Dimin Niu
authored at least 55 papers
between 2010 and 2024.
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On csauthors.net:
Bibliography
2024
Proceedings of the 2024 USENIX Annual Technical Conference, 2024
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2024
2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Trans. Parallel Distributed Syst., September, 2023
ACM Trans. Archit. Code Optim., September, 2023
TT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
CHAM: A Customized Homomorphic Encryption Accelerator for Fast Matrix-Vector Product.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
NMExplorer: An Efficient Exploration Framework for DIMM-based Near-Memory Tensor Reduction.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Practical Near-Data-Processing Architecture for Large-Scale Distributed Graph Neural Network.
IEEE Access, 2022
IEEE Access, 2022
OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs.
IEEE Access, 2022
COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
184QPS/W 64Mb/mm<sup>2</sup>3D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio.
Proceedings of the 28th IEEE International Conference on Parallel and Distributed Systems, 2022
Enabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
J. Comput. Sci. Technol., 2021
2020
iPIM: Programmable In-Memory Image Processing Accelerator Using Near-Bank Architecture.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Proceedings of the Advanced Computer Architecture - 13th Conference, 2020
2019
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Performance Impact of Emerging Memory Technologies on Big Data Applications: A Latency-Programmable System Emulation Approach.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
2017
Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
2015
ACM Trans. Design Autom. Electr. Syst., 2015
Impact of Write Pulse and Process Variation on 22 nm FinFET-Based STT-RAM Design: A Device-Architecture Co-Optimization Approach.
IEEE Trans. Multi Scale Comput. Syst., 2015
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
2014
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
3DLAT: TSV-based 3D ICs crosstalk minimization utilizing Less Adjacent Transition code.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
Device-architecture co-optimization of STT-RAM based memory for low power embedded systems.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010