Dillon Huff

Orcid: 0000-0001-9055-3490

According to our database1, Dillon Huff authored at least 9 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators.
ACM Trans. Archit. Code Optim., June, 2023

AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.
ACM Trans. Embed. Comput. Syst., March, 2023

2021
A polyhedral compiler for image processing hardware.
PhD thesis, 2021

Compiling Halide Programs to Push-Memory Accelerators.
CoRR, 2021

Clockwork: Resource-Efficient Static Scheduling for Multi-Rate Image Processing Applications on FPGAs.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020
Type-directed scheduling of streaming accelerators.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020


2018
Using Runtime Circuit Specialization to Accelerate Simulations of Reconfigurable Architectures.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

CoSA: Integrated Verification for Agile Hardware Design.
Proceedings of the 2018 Formal Methods in Computer Aided Design, 2018


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