Dihu Chen
Orcid: 0000-0001-5432-8149
According to our database1,
Dihu Chen
authored at least 57 papers
between 2011 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
Sparse-attention augmented domain adaptation for unsupervised person re-identification.
Pattern Recognit. Lett., 2025
2024
A lightweight distillation recurrent convolution network on FPGA for real-time video super-resolution.
Multim. Syst., December, 2024
Self-Supervised Consistency Based on Joint Learning for Unsupervised Person Re-identification.
ACM Trans. Multim. Comput. Commun. Appl., January, 2024
Mining Semantic Information With Dual Relation Graph Network for Multi-Label Image Classification.
IEEE Trans. Multim., 2024
27.5 A Wireless Power Transfer System with Up-to-27.9% Efficiency Improvement under Coupling Coefficient Ranging from 0.1 to 0.39 Based on Phase-Shift/Time-Constant Detection and Hybrid Transmission Power Control.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
SHP-FsNTT: A Scalable and High-Performance NTT Accelerator Based on the Four-step Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Pattern Recognit. Lett., April, 2023
ACM Trans. Multim. Comput. Commun. Appl., 2023
Diverse Feature Learning Network With Attention Suppression and Part Level Background Suppression for Person Re-Identification.
IEEE Trans. Circuits Syst. Video Technol., 2023
IEEE Signal Process. Lett., 2023
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
A Fully Integrated High-Efficiency All-NMOS Charge Pump for Wide Input Range Ultra-Low Dropout Regulator.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023
A $2.81\mu \mathrm{W}$, Energy Efficient MFCC Feature Extractor for Keyword-Spotting in 65nm CMOS.
Proceedings of the 8th International Conference on Computer and Communication Systems, 2023
An Instant-Setup On-Delay Compensation Scheme Based on Phase Detection for Series-Resonant Wireless Power Receiver with Up-to-4.41% Efficiency Enhancement.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
A 2-W, 90%-Efficiency Single-Stage Dual-Output Wireless Power Receiver with 0.1 to 700-mA Output Current Range Through Dynamic Delay Compensation and Bootstrap Adaptive Body Biasing Circuit.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
Two-Branch Asymmetric Model With Alternately Clustering for Unsupervised Person Re-Identification.
IEEE Signal Process. Lett., 2022
Neural Process. Lett., 2022
2021
IEEE Trans. Circuits Syst. Video Technol., 2021
IEEE Signal Process. Lett., 2021
Boundary Adjusted Network Based on Cosine Similarity for Temporal Action Proposal Generation.
Neural Process. Lett., 2021
IET Comput. Vis., 2021
2020
IEEE Trans. Circuits Syst. Video Technol., 2020
Deeply Associative Two-Stage Representations Learning Based on Labels Interval Extension Loss and Group Loss for Person Re-Identification.
IEEE Trans. Circuits Syst. Video Technol., 2020
W-Band Synthesized Modulator and Demodulator with Wideband Performance in 65-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A Wide-Band Digital Lock-In Amplifier and Its Application in Microfluidic Impedance Measurement.
Sensors, 2019
Hierarchical extended collaborative representation based classification for single-sample face recognition.
IET Comput. Vis., 2019
IEEE Access, 2019
Area Optimized Synthesis of Compressor Trees on Xilinx FPGAs Using Generalized Parallel Counters.
IEEE Access, 2019
Unsupervised Object-Level Image-to-Image Translation Using Positional Attention Bi-Flow Generative Network.
IEEE Access, 2019
IEEE Access, 2019
Proceedings of the Pattern Recognition and Computer Vision - Second Chinese Conference, 2019
2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor.
Microelectron. J., 2018
A New Circuit Topology for High-Performance Pulsed Time-of- Flight Laser Radar Receivers.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
An Output-Capacitorless Adaptively Biased Low-Dropout Regulator with Maximum 132-MHz UGF and Without Minimum Loading Requirement.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
A mechanism for detecting on-chip radio frequency interference of field-programmable gate array.
Integr., 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
A fast-response buck-boost DC-DC converter with constructed full-wave current sensor.
Proceedings of the International Symposium on Integrated Circuits, 2016
A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter.
Proceedings of the International Symposium on Integrated Circuits, 2016
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Int. J. Circuit Theory Appl., 2015
A Computer-Aided Diagnosis System for Dynamic Contrast-Enhanced MR Images Based on Level Set Segmentation and ReliefF Feature Selection.
Comput. Math. Methods Medicine, 2015
Cascoded flipped voltage follower based output-capacitorless low-dropout regulator for SoCs.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
A 3.5-A buck DC-DC regulator with wire drop compensation for remote-loading applications.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
Combining shape regression model and isophotes curvature information for eye center localization.
Proceedings of the 7th International Conference on Biomedical Engineering and Informatics, 2014
2013
A gradual scheduling framework for problem size reduction and cross basic block parallelism exploitation in high-level synthesis.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2011
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011