Dieison Antonello Deprá

According to our database, Dieison Antonello Deprá authored at least 3 papers between 2008 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Techniques for Architecture Design for Binary Arithmetic Decoder Engines Based on Bitstream Flow Analysis.

Dieison Antonello Deprá, Sergio Bampi

Proceedings of the VLSI-SoC: Technologies for Systems Integration, 2009

A method for HW functional verification through HW/SW co-simulation in complex systems: H.264/AVC decoder as case study.

Dieison Antonello Deprá, Bruno Zatt, Sergio Bampi

Proceedings of the 10th Latin American Test Workshop, 2009

2008

A novel hardware architecture design for binary arithmetic decoder engines based on bitstream flow analysis.

Dieison Antonello Deprá, Vagner Santos Da Rosa, Sergio Bampi

Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008