Diego Cabello
Orcid: 0000-0002-4859-2899
According to our database1,
Diego Cabello
authored at least 84 papers
between 1993 and 2024.
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Bibliography
2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2022
An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2020
On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Ultralow power voltage reference circuit for implantable devices in standard CMOS technology.
Int. J. Circuit Theory Appl., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm<sup>2</sup> Subthreshold Voltage Reference for Implantable Devices.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
2018
Pulsed time-of-flight pixel with on-chip 20 klux background light suppression in standard CMOS technology.
Int. J. Circuit Theory Appl., 2018
In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors.
Int. J. Circuit Theory Appl., 2018
Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
2017
IEEE J. Solid State Circuits, 2017
Effect of temporal and spatial noise on the performance of hardware oriented background extraction algorithms.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
2016
Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting.
Int. J. Circuit Theory Appl., 2016
Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Sensors, 2015
Proceedings of the IEEE Sensors Applications Symposium, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Split and shift methodology on cellular processor arrays: area saving versus time penalty.
Int. J. Circuit Theory Appl., 2014
Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the ESSCIRC 2014, 2014
2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
A 176×120 pixel CMOS vision chip for Gaussian filtering with massivelly Parallel CDS and A/D-conversion.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2009
A dc <i>I</i>-<i>V</i> model for short-channel polygonal enclosed-layout transistors.
Int. J. Circuit Theory Appl., 2009
Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields.
Comput. Geosci., 2009
EURASIP J. Adv. Signal Process., 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
FPGA-based hardware accelerator of the heat equation with applications on infrared thermography.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
2007
CNN Implementation of Spin Filters for Electronic Speckle Pattern Interferometry Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the FPL 2007, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing models.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
Int. J. Circuit Theory Appl., 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
IEEE Trans. Geosci. Remote. Sens., 2004
Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
A mixed-signal CMOS DTCNN chip for pixel-level snakes.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Medical Image Anal., 2003
Image Vis. Comput., 2003
Proceedings of the Pattern Recognition and Image Analysis, First Iberian Conference, 2003
2002
Int. J. Circuit Theory Appl., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Image Vis. Comput., 2001
Curvature Dependent Diffusion for Feature Detection in 3D Medical Images.
Proceedings of the IASTED International Conference on Visualization, 2001
2000
Pattern Recognit. Lett., 2000
Proceedings of the University as a Bridge from Technology to Society: IEEE International Symposium on Technology and Society, 2000
Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the 15th International Conference on Pattern Recognition, 2000
1999
Comput. Biomed. Res., 1999
Genetic Algorithm Based Training for Multilayer Discrete-Time Cellular Neural Networks.
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999
1998
IEEE Trans. Medical Imaging, 1998
Pattern Recognit. Lett., 1998
An analog CMOS realisation of a reconfigurable discrete-time cellular neural network.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the British Machine Vision Conference 1998, 1998
1997
Pattern Recognit. Lett., 1997
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997
Proceedings of the Image Analysis and Processing, 9th International Conference, 1997
1996
The Markov random fields in functional neighbors as a texture model: applications in texture classification.
Proceedings of the 13th International Conference on Pattern Recognition, 1996
1995
Proceedings of the From Natural to Artificial Neural Computation, 1995
Proceedings of the Image Analysis Applications and Computer Graphics, 1995
1993
Proceedings of the New Trends in Neural Computation, 1993
Proceedings of the New Trends in Neural Computation, 1993