Didier Née

According to our database, Didier Née authored at least 10 papers between 2002 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

Back-end soft and hard defect monitoring using a single test chip.

Fabrice Rigaud, Jean-Michel Portal, Hassen Aziza, Didier Née, Julien Vast, Fabrice Argoud, Bertrand Borot

Microelectron. Reliab., 2011

2005

EEPROM Diagnosis Based on Threshold Voltage Embedded Measurement.

Jean-Michel Portal, Hassen Aziza, Didier Née

J. Electron. Test., 2005

Flash Memory Cell: Parametric Test Data Reconstruction for Process Monitoring.

B. Saillet, Jean-Michel Portal, Didier Née

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

A New Embedded Measurement Structure for eDRAM Capacitor.

Laurent Lopez, Jean-Michel Portal, Didier Née

Proceedings of the 2005 Design, 2005

2003

EEPROM Memory: Threshold Voltage Built In Self Diagnosis.

Jean-Michel Portal, Hassen Aziza, Didier Née

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Infrastructure IP for Back-End Yield Improvement.

L. Forli, Jean-Michel Portal, Didier Née, Bertrand Borot

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002

An Automated Design Methodology for EEPROM Cell (ADE).

Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Née

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002

An Automated Methodology to Diagnose Geometric Defect in the EEPROM Cell.

Jean-Michel Portal, L. Forli, Hassen Aziza, Didier Née

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Floating-gate EEPROM cell model based on MOS model 9.

Jean-Michel Portal, L. Forli, Didier Née

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Floating-gate EEPROM cell: threshold voltage sensibility to geometry.

Jean-Michel Portal, L. Forli, Didier Née

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002