Diana Tsvetanova

According to our database, Diana Tsvetanova authored at least 3 papers between 2018 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

First demonstration of Two Metal Level Semi-damascene Interconnects with Fully Self-aligned Vias at 18MP.

Gayle Murdoch, Matin O'Toole, Giulio Marti, Ankit Pokhrel, Diana Tsvetanova, Stefan Decoster, Shreya Kundu, Yusuke Oniki, Arame Thiam, Quoc Toan Le, Olalla Varela Pedreira, Alicja Lesniewska, Gerardo Martinez-Alanis, Seongho Park, Zsolt Tokei

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2018

SOT-MRAM 300mm integration for low power and ultrafast embedded memories.

Kevin Garello, Farrukh Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, N. Jossart, Kris Croes, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Furnémont, Pietro Gambardella, Gouri Sankar Kar

CoRR, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.

Kevin Garello, Kevin Garello Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018