Diana Göhringer

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021

CoopCL: A Framework for Cooperative Execution of Data-parallel Kernels on Multi-device Platforms.

[BibT_eX]

[DOI]

Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2021

A Survey on Hypervisor-based Virtualization of Embedded Reconfigurable Systems.

[BibT_eX]

[DOI]

Cornelia Wulf

Michael Willig

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Wormhole Computing in Networks-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Reconfigurable Computing Systems as Component-oriented Designs for Robotics.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures.

[BibT_eX]

[DOI]

Ahmed Kamaleldin

Hector Gerardo Muñoz Hernandez

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

AITIA: Embedded AI Techniques for Industrial Applications.

[BibT_eX]

[DOI]

Marcelo Brandalero

Mitko Veleski

Jurgen Vandendriessche

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Power-Aware Real-Time Operating Systems on Reconfigurable Architectures.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Power-Aware Computing Systems on FPGAs: A Survey.

[BibT_eX]

[DOI]

Sergio Andres Pertuz Mendez

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Optimized Deep Learning Object Recognition for Drones using Embedded GPU.

[BibT_eX]

[DOI]

Pedram Amini Rad

Danny Hofmann

Proceedings of the 26th IEEE International Conference on Emerging Technologies and Factory Automation, 2021

Near-Data-Processing Architectures Performance Estimation and Ranking using Machine Learning Predictors.

[BibT_eX]

[DOI]

Veronia Iskandar

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Vector Processing Unit: A RISC-V based SIMD Co-processor for Embedded Processing.

[BibT_eX]

[DOI]

Matthias von Ameln

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020

SDMPSoC: Software-Defined MPSoC for FPGAs.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2020

Guest Editorial Note: Special Issue on Applied Reconfigurable Computing.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2020

HPPT-NoC: A Dark-Silicon Inspired Hierarchical TDM NoC with Efficient Power-Performance Trading.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2020

Optimizing the Operational Time of Ambient Assisting Living Robots.

[BibT_eX]

[DOI]

Georgios Keramidas

Evaggelinos P. Mariatos

IEEE Consumer Electron. Mag., 2020

Toward an ICT-Based Service Oriented Health Care Paradigm.

[BibT_eX]

[DOI]

IEEE Consumer Electron. Mag., 2020

Towards a Modular RISC-V Based Many-Core Architecture for FPGA Accelerators.

[BibT_eX]

[DOI]

Ahmed Kamaleldin

IEEE Access, 2020

Indoor THz SAR Trajectory Deviations Effects and Compensation With Passive Sub-mm Localization System.

[BibT_eX]

[DOI]

IEEE Access, 2020

Experimental Analysis of High Resolution Indoor THz SAR Imaging.

[BibT_eX]

[DOI]

Proceedings of the 24th International ITG Workshop on Smart Antennas, 2020

CoopCL: Cooperative Execution of OpenCL Programs on Heterogeneous CPU-GPU Platforms.

[BibT_eX]

[DOI]

Proceedings of the 28th Euromicro International Conference on Parallel, 2020

Low Power Scheduling of Periodic Hardware Tasks in Flash-Based FPGAs.

[BibT_eX]

[DOI]

Cornelia Wulf

Michael Willig

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

Energy Efficient Synchronous - Asynchronous Circuit-Switched NoC.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

AITIA: Embedded AI Techniques for Embedded Industrial Applications.

[BibT_eX]

[DOI]

Marcelo Brandalero

Hector Gerardo Muñoz Hernandez

Laurens Le Jeune

Proceedings of the 2020 International Conference on Omni-layer Intelligent Systems, 2020

Cycle-Accurate Debugging of Embedded Designs Using Recurrent Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

RISC-V Based MPSoC Design Exploration for FPGAs: Area, Power and Performance.

[BibT_eX]

[DOI]

Pedram Amini Rad

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

SysIDLib: A High-Level Synthesis FPGA Library for Online System Identification.

[BibT_eX]

[DOI]

Marawan Azmy Hebaish

Mahmoud Ahmed Elshimy

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019

Whisper: Fast Flooding for Low-Power Wireless Networks.

[BibT_eX]

[DOI]

ACM Trans. Sens. Networks, 2019

Intrusive FPGA-in-the-loop debugging using a rule-based inference system.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2019

A framework for accelerating local feature extraction with OpenCL on multi-core CPUs and co-processors.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2019

Scalable clustering and mapping algorithm for application distribution on heterogeneous and irregular FPGA clusters.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2019

FPGA-ROS: Methodology to Augment the Robot Operating System with FPGA Designs.

[BibT_eX]

[DOI]

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Cycle-Accurate Debugging of Multi-clock Reconfigurable Systems.

[BibT_eX]

[DOI]

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Modular Memory System for RISC-V Based MPSoCs on Xilinx FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

Dark-Silicon Inspired Energy Efficient Hierarchical TDM NoC.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Inspection of Partial Bitstreams for FPGAs Using Artificial Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Hardware/Software-Codesign for Hand Gestures Recognition using a Convolutional Neural Network.

[BibT_eX]

[DOI]

Sarah Said

Proceedings of the INTESA 2019 Proceedings, 2019

System Identification using LMS, RLS, EKF and Neural Network.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference of Vehicular Electronics and Safety, 2019

IP Core Identification in FPGA Configuration Files using Machine Learning Techniques.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE International Conference on Consumer Electronics, 2019

Efficient Pattern Recognition Algorithm Including a Fast Retina Keypoint FPGA Implementation.

[BibT_eX]

[DOI]

Maximilian Hajduk

Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

HiFlipVX: An Open Source High-Level Synthesis FPGA Library for Image Processing.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018

Application Deployment Strategies for Spatial Isolation on Many-Core Accelerators.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2018

Sensor data fusion in the context of electric vehicles charging stations using a Network-on-Chip.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2018

ASIR: Application-Specific Instruction-Set Router for NoC-Based MPSoCs.

[BibT_eX]

[DOI]

Comput., 2018

Full-HD Accelerated and Embedded Feature Detection Video System with 63fps using ORB for FREAK.

[BibT_eX]

[DOI]

Hassan Ibrahim

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Dynamic tunable and reconfigurable hardware controller with EKF-based state reconstruction through FPGA-in the loop.

[BibT_eX]

[DOI]

Mahmoud Ahmed Elshimy

Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Analysis of Synchronous-Asynchronous NoC for the Dark Silicon Era.

[BibT_eX]

[DOI]

Reem W. Etman

Klaus Hoffman

Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

Introduction to RAW 2018.

[BibT_eX]

[DOI]

Dirk Stroobandt

Ken Eguro

Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Automatic Mapping for OpenCL-Programs on CPU/GPU Heterogeneous Platforms.

[BibT_eX]

[DOI]

Proceedings of the Computational Science - ICCS 2018, 2018

Automatic OpenCL Code Generation from LLVM-IR using Polyhedral Optimization.

[BibT_eX]

[DOI]

Tim Hebbeler

Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018

Cycle-Accurate and Cycle-Reproducible Debugging of Embedded Designs Using Artificial Intelligence.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Low Power Image Processing Applications on FPGAs Using Dynamic Voltage Scaling and Partial Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

Supporting Utilities for Heterogeneous Embedded Image Processing Platforms (STHEM): An Overview.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

High-Level Synthesis of Software-Defined MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

An Intrusive Dynamic Reconfigurable Cycle-Accurate Debugging System for Embedded Processors.

[BibT_eX]

[DOI]

Ahmed Kamal

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Experience.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017

Survey on Real-Time Networks-on-Chip.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2017

Special issue on design of algorithms and architectures for signal and image processing.

[BibT_eX]

[DOI]

Marek Gorgon

João M. P. Cardoso

Leandro Soares Indrusiak

J. Syst. Archit., 2017

HW/SW Co-Design of the HOG algorithm on a Xilinx Zynq SoC.

[BibT_eX]

[DOI]

Andrew Boutros

J. Parallel Distributed Comput., 2017

Tackling The New Health-Care Paradigm Through Service Robotics: Unobtrusive, efficient, reliable, and modular solutions for assisted-living environments.

[BibT_eX]

[DOI]

IEEE Consumer Electron. Mag., 2017

An event-based Network-on-Chip debugging system for FPGA-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Application-specific processing using high-level synthesis for networks-on-chip.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

A call-up for circuit-switched NoCs in the Dark-Silicon Era.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

Data Stream Processing in Networks-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Profile-Driven Power Optimizations for AAL Robots: Maximizing Robots Idle Time by Offloading Monitoring Workload to Dedicated Hardware Components.

[BibT_eX]

[DOI]

Georgios Keramidas

Nikolaos S. Voros

Fynn Schwiegelshohn

Evaggelinos P. Mariatos

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

HW/SW Co-design of an IEEE 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

Access Network Generation for Efficient Debugging of FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

Accelerated Embedded AKAZE Feature Detection Algorithm on FPGA.

[BibT_eX]

[DOI]

Khaled Mohamed

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

Exploration of OpenCL for FPGAs using SDAccel and comparison to GPUs and multicore CPUs.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Robust lane recognition for autonomous driving.

[BibT_eX]

[DOI]

Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

FPGA Debugging with MATLAB Using a Rule-Based Inference System.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

2016

Simulating Reconfigurable Multiprocessor Systems-on-Chip with MPSoCSim.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2016

Enabling indoor object localization through Bluetooth beacons on the RADIO robot platform.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

MPSoCSim extension: An OVP simulator for the evaluation of cluster-based multi and many-core architectures.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

TULIPP: Towards ubiquitous low-power image processing platforms.

[BibT_eX]

[DOI]

Per Gunnar Kjeldsberg

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Dynamic spatially isolated secure zones for NoC-based many-core accelerators.

[BibT_eX]

[DOI]

Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

RePaBit: Automated generation of relocatable partial bitstreams for Xilinx Zynq FPGAs.

[BibT_eX]

[DOI]

Konstantin Friesen

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

FPGA debugging by a device start and stop approach.

[BibT_eX]

[DOI]

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Enabling dynamic and partial reconfiguration in Xilinx SDSoC.

[BibT_eX]

[DOI]

Tobias Kalb

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Sensor data fusion with MPSoCSim in the context of electric vehicle charging stations.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

RAW Introduction and Committees.

[BibT_eX]

[DOI]

Ramachandran Vaidyanathan

Steven J. E. Wilton

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

LinROS: A Linux-Based Runtime System for Reconfigurable MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Clustering and Mapping Algorithm for Application Distribution on a Scalable FPGA Cluster.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

ARTNoCs: An Evaluation Framework for Hardware Architectures of Real-Time NoCs.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Development of advanced driver assistance systems using LabVIEW and a car simulator.

[BibT_eX]

[DOI]

Proceedings of the 2016 Workshop on Embedded and Cyber-Physical Systems Education, 2016

Computation and communication challenges to deploy robots in assisted living environments.

[BibT_eX]

[DOI]

Georgios Keramidas

Theodoros Giannakopoulos

Vaggelis Mariatos

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Session 3: Method and tools for system design.

[BibT_eX]

[DOI]

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015

Guest Editorial ARC 2014.

[BibT_eX]

[DOI]

João M. P. Cardoso

Koen Bertels

ACM Trans. Reconfigurable Technol. Syst., 2015

MPSoCSim: An extended OVP simulator for modeling and evaluation of Network-on-Chip based heterogeneous MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

ViPES 2015 - Preface.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Real-time pedestrian detection on a xilinx zynq using the HOG algorithm.

[BibT_eX]

[DOI]

Andrew Boutros

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

RAW Introduction and Committees.

[BibT_eX]

[DOI]

Ramachandran Vaidyanathan

Steven J. E. Wilton

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Online bicast allocation algorithm for contention-free-routing NoCs.

[BibT_eX]

[DOI]

Ali Ahmed

Klaus Hofmann

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A Holistic Approach for Advancing Robots in Ambient Assisted Living Environments.

[BibT_eX]

[DOI]

Nikolaos S. Voros

Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015

Robot navigation based on an efficient combination of an extended A∗ algorithm, bird's eye view and image stitching.

[BibT_eX]

[DOI]

David Gburek

Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

A Flexible Software Framework for Dynamic Task Allocation on MPSoCs Evaluated in an Automotive Context.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

Survey on Real-Time Network-on-Chip Architectures.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Perspective.

[BibT_eX]

[DOI]

Theodoros Giannakopoulos

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

Introduction to the Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES).

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2014

Reconfigurable Multiprocessor Systems: Handling Hydras Heads - A Survey.

[BibT_eX]

[DOI]

SIGARCH Comput. Archit. News, 2014

Special Issue on Networks-on-Chip and Memories for Multicore Architectures.

[BibT_eX]

[DOI]

Hamid Sarbazi-Azad

Rainer Stotzka

Microprocess. Microsystems, 2014

Using JSON to manage communication between services in the Internet of Things.

[BibT_eX]

[DOI]

Christina Piberger

Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014

RAR-NoC: A reconfigurable and adaptive routable Network-on-Chip for FPGA-based multiprocessor systems.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Parallel and distributed simulation of networked multi-core systems.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on System-on-Chip, 2014

Future Trends on Adaptive Processing Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

Development of driver assistance systems using virtual hardware-in-the-loop.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

An Interactive Tool based on Polly for Detection and Parallelization of Loops.

[BibT_eX]

[DOI]

Jan Tepelmann

Proceedings of the 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2014

Accelerating local feature extraction using OpenCL on heterogeneous platforms.

[BibT_eX]

[DOI]

Thomas Perschke

Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013

Introduction to the special section on 19th reconfigurable architectures workshop (RAW 2012).

[BibT_eX]

[DOI]

René Cumplido

ACM Trans. Reconfigurable Technol. Syst., 2013

Reliable and adaptive network-on-chip architectures for cyber physical systems.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2013

Rapid prototyping of a portable HW/SW co-design on the virtual zynq platform using SystemC.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

Dynamic and partial reconfiguration of Zynq 7000 under Linux.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Evaluation of driver assistance systems with a car simulator using a virtual and a real FPGA platform.

[BibT_eX]

[DOI]

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012

Adaptive Multiclient Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer, and Application Exploration.

[BibT_eX]

[DOI]

Int. J. Reconfigurable Comput., 2012

Adaptive processor architecture - invited paper.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

From Scilab to multicore embedded systems: Algorithms and methodologies.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Special session on "programming paradigms for reconfigurable multi-core embedded systems".

[BibT_eX]

[DOI]

Pedro C. Diniz

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Invited paper: On-chip monitoring for adaptive heterogeneous multicore systems.

[BibT_eX]

[DOI]

Mounir Chemaou

Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach.

[BibT_eX]

[DOI]

Dimitrios Kritharidis

Nikolaos Mitas

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Virtualization of heterogeneous and adaptive multi-core/multi-board systems.

[BibT_eX]

[DOI]

Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011

Flexible Design and Dynamic Utilization of Adaptive Scalable Multi-Core Systems.

[BibT_eX]

[DOI]

PhD thesis, 2011

Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems.

[BibT_eX]

[DOI]

Int. J. Reconfigurable Comput., 2011

Operating System for Runtime Reconfigurable Multiprocessor Systems.

[BibT_eX]

[DOI]

Etienne Nguepi Zeutebouo

Int. J. Reconfigurable Comput., 2011

Heterogeneous and runtime parameterizable Star-Wheels Network-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Dynamic Processor Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Adaptive Multi-client Network-on-Chip Memory.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Power and performance optimization through MPI supported dynamic voltage and frequency scaling.

[BibT_eX]

[DOI]

Proceedings of the 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, 2011

RAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support.

[BibT_eX]

[DOI]

Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011

2010

Message Passing Interface support for the runtime adaptive multi-processor system-on-chip RAMPSoC.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Impact of Task Distribution, Processor Configurations and Dynamic Clock Frequency Scaling on the Power Consumption of FPGA-based Multiprocessors.

[BibT_eX]

Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

New Dimensions in Design Space and Runtime Adaptivity for Multiprocessor Systems Through Dynamic and Partial Reconfiguration: The RAMPSoC Approach.

[BibT_eX]

[DOI]

Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

FPGA-Based Runtime Adaptive Multiprocessor Approach for Embedded High Performance Computing Applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

CAP-OS: Operating system for runtime scheduling, task mapping and resource management on reconfigurable multiprocessor architectures.

[BibT_eX]

[DOI]

Etienne Nguepi Zeutebouo

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

High performance reconfigurable multi-processor-based computing on FPGAs.

[BibT_eX]

[DOI]