Di Li

Orcid: 0000-0001-6118-7401

Affiliations:
  • Xidian University, School of Microelectronics, Xi'an, China


According to our database1, Di Li authored at least 25 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
The High-Efficiency Optimization Design Method for Two-Stage Miller Compensated Operational Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

2023
An improved Fourier Ptychography algorithm for ultrasonic array imaging.
Comput. Biol. Medicine, September, 2023

A High-Efficiency Design Method of TSV Array for Thermal Management of 3-D Integrated System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

An Improved MOS Self-Biased Ring Amplifier and Modified Auto-Zeroing Scheme.
IEEE Trans. Very Large Scale Integr. Syst., April, 2023

The Development and Progress of Multi-Physics Simulation Design for TSV-Based 3D Integrated System.
Symmetry, February, 2023

Thermal-Stress Coupling Optimization for Coaxial through Silicon Via.
Symmetry, February, 2023

2022
An Improved Indoor 3-D Ultrawideband Positioning Method by Particle Swarm Optimization Algorithm.
IEEE Trans. Instrum. Meas., 2022

Optimized Backing Layers Design for High Frequency Broad Bandwidth Ultrasonic Transducer.
IEEE Trans. Biomed. Eng., 2022

2021
Analysis and Design of Low-Complexity Stochastic DEM Encoder for Reduced-Distortion Multi-bit DAC in Sigma-Delta Modulators.
Circuits Syst. Signal Process., 2021

2020
High Resolution ADC for Ultrasound Color Doppler Imaging Based on MASH Sigma-Delta Modulator.
IEEE Trans. Biomed. Eng., 2020

A 20-MHz BW MASH Sigma-Delta Modulator with Mismatch Noise Randomization for Multi-Bit DACs.
J. Circuits Syst. Comput., 2020

An optimized fully-passive noise-shaping SAR ADC with integration capacitor reuse technique.
IEICE Electron. Express, 2020

2019
A 6-bit digital CMOS variable gain attenuator with large dynamic range and high linearity-in-dB for ultrasound imaging applications.
Microelectron. J., 2019

Mismatch errors randomization for multi-bit DAC in sigma-delta modulators based on butterfly-type network.
Microelectron. J., 2019

A 15-MHz bandwidth double sampling MASH25b-15b sigma-delta modulator with DEM for multibit DACs.
Int. J. Circuit Theory Appl., 2019

A large dynamic range voltage controlled attenuator with improved linearity-in-dB for ultrasound applications.
Int. J. Circuit Theory Appl., 2019

2016
Design of a fully integrated receiver analog baseband chain for 2.4-GHz ZigBee applications.
Microelectron. J., 2016

A Power-Efficient Compact Pipelined ADC for ZigBee Receiver Applications.
J. Circuits Syst. Comput., 2016

A large dynamic-range, high dB-linearity VGA using switch arrays and second-order mismatch-shaping DEM technique.
Int. J. Circuit Theory Appl., 2016

An IM2-free floating current buffer using average power based automatic calibration for IEEE 802.15.6 transmitter.
IEICE Electron. Express, 2016

2015
A 5-GHz LC VCO with digital AAC and AFBS for 2.4 GHz ZigBee transceiver applications.
Microelectron. J., 2015

A low-distortion multi-bit sigma-delta ADC with mismatch-shaping DACs for WLAN applications.
Microelectron. J., 2015

2014
A fully integrated feedback AGC loop for ZigBee (IEEE 802.15.4) RF transceiver applications.
Microelectron. J., 2014

Design of a Fully Integrated 2.4 GHz frequency PLL synthesizer for ZigBee Transceiver Application.
J. Circuits Syst. Comput., 2014

2010
Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer.
J. Zhejiang Univ. Sci. C, 2010


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