Dhruva Ghai

According to our database, Dhruva Ghai authored at least 23 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

A Precision-Aware Neuron Engine for DNN Accelerators.

Sudheer Vishwakarma, Gopal Raut, Sonu Jaiswal, Santosh Kumar Vishvakarma, Dhruva Ghai

SN Comput. Sci., June, 2024

2023

A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators.

Sudheer Vishwakarma, Gopal Raut, Narendra Singh Dhakad, Santosh Kumar Vishvakarma, Dhruva Ghai

Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023

2021

Federated Learning.

Niranjan Kumar Ray, Deepak Puthal, Dhruva Ghai

IEEE Consumer Electron. Mag., 2021

2019

Novel Intrusion Detection and Prevention for Mobile Ad Hoc Networks: A Single- and Multiattack Case Study.

Gurveen Vaseer, Garima Ghai, Dhruva Ghai

IEEE Consumer Electron. Mag., 2019

Computing in Geographic Information Systems [Book Review].

Dhruva Ghai

IEEE Consumer Electron. Mag., 2019

2018

Distributed Trust-Based Multiple Attack Prevention for Secure MANETs.

Gurveen Vaseer, Garima Ghai, Dhruva Ghai

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2018

2014

Variability-aware design of double gate FinFET-based current mirrors.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral, Oghenekarho Okobiah

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013

Fast optimization of nano-CMOS voltage-controlled oscillator using polynomial regression and genetic algorithm.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Microelectron. J., 2013

Comparative analysis of double gate FinFET configurations for analog circuit design.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Double gate FinFET based mixed-signal design: A VCO case study.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study.

Dhruva Ghai, Saraju P. Mohanty, Garima Thakral

Proceedings of the International Symposium on Quality Electronic Design, 2013

2010

A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM.

Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A P4VT (Power Performance Process Parasitic Voltage Temperature) Aware Dual-VTh Nano-CMOS VCO.

Saraju P. Mohanty, Dhruva Ghai, Elias Kougianos

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP.

Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM.

Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2009

Design of Parasitic and Process-Variation Aware Nano-CMOS RF Circuits: A VCO Case Study.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos

IEEE Trans. Very Large Scale Integr. Syst., 2009

A universal level converter towards the realization of energy efficient implantable drug delivery Nano-Electro-Mechanical-Systems.

Saraju P. Mohanty, Dhruva Ghai, Elias Kougianos, Bharat Joshi

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

A PVT aware accurate statistical logic library for high- metal-gate nano-CMOS.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos, Priyadarsan Patra

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Variability-aware optimization of nano-CMOS Active Pixel Sensors using design and analysis of Monte Carlo experiments.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2008

Parasitic Aware Process Variation Tolerant Voltage Controlled Oscillator (VCO) Design.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

A Dual Oxide CMOS Universal Voltage Converter for Power Management in Multi-VDD SoCs.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip.

Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008