Dharshak B. S.

According to our database, Dharshak B. S. authored at least 1 paper in 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A High Performance Gated Voltage Level Translator with Integrated Multiplexer.

Dharshak B. S., Rahul M. Rao

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018