Dhandeep Challagundla

According to our database, Dhandeep Challagundla authored at least 4 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2024

A Resonant Time-Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations.

Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023

Design Automation of Series Resonance Clocking in 14-nm FinFETs.

Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam

Circuits Syst. Signal Process., December, 2023

Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean Logic.

Dhandeep Challagundla, Ignatius Bezzam, Biprangshu Saha, Riadul Islam

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2022

Power and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocks.

Dhandeep Challagundla, Mehedi Galib, Ignatius Bezzam, Riadul Islam

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022