Deyi Pi
According to our database1,
Deyi Pi
authored at least 12 papers
between 2007 and 2013.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2013
A Sub-2 W 39.8-44.6 Gb/s Transmitter and Receiver Chipset With SFI-5.2 Interface in 40 nm CMOS.
IEEE J. Solid State Circuits, 2013
2012
A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission.
IEEE J. Solid State Circuits, 2012
A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
A Synthesis-Based Bandwidth Enhancement Technique for CMOS Amplifiers: Theory and Design.
IEEE J. Solid State Circuits, 2011
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber.
IEEE J. Solid State Circuits, 2010
2009
IEEE J. Solid State Circuits, 2009
21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007