Devraj Rajagopal

According to our database, Devraj Rajagopal authored at least 3 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Multi Voltage High Performance Bidirectional Buffer in a Low Voltage CMOS process.

Pranshu Kalra, Devraj Rajagopal, Sumantra Seth, Anshul Sirohi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2015

7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip.

Hyun-Jin Kim, Jeong-Don Lim, Jang-Woo Lee, Dae-Hoon Na, Joon-Ho Shin, Chae-Hoon Kim, Seungwoo Yu, Ji-Yeon Shin, Seon-Kyoo Lee, Devraj Rajagopal, Sang-Tae Kim, Kyeong-Tae Kang, Jeong-Joon Park, Yongjin Kwon, Min-Jae Lee, Sunghoon Kim, Seunghoon Shin, Hyunggon Kim, Jin-Tae Kim, Ki-Sung Kim, Han-Sung Joo, Chanjin Park, Jae-Hwan Kim, Man-Joong Lee, Do-Kook Kim, Hyang-Ja Yang, Dae-Seok Byeon, Ki-Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

A 1.8/2.5/3.3V BiCMOS I/O driver with VCC=5V.

Samiran Dasgupta, Devraj Rajagopal

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014