Devendra Rai

According to our database1, Devendra Rai authored at least 18 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Guest Editors' Introduction: Cross-Layer Design of Cyber-Physical Systems.
IEEE Des. Test, 2021

2016
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms.
J. Syst. Archit., 2016

2015
Temperature Aware Multiprocessing with Reliability Considerations.
PhD thesis, 2015

Thermal Covert Channels on Multi-core Platforms.
Proceedings of the 24th USENIX Security Symposium, 2015

A calibration based thermal modeling technique for complex multicore systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Isolated Execution on Many-core Architectures.
IACR Cryptol. ePrint Arch., 2014

EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes.
CoRR, 2014

EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

An Efficient Real Time Fault Detection and Tolerance Framework Validated on the Intel SCC Processor.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Real-time worst-case temperature analysis with temperature-dependent parameters.
Real Time Syst., 2013

Reliable and Efficient Execution of Multiple Streaming Applications on Intel's SCC Processor.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

Designing Applications with Predictable Runtime Characteristics for the Baremetal Intel SCC.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

Distributed stable states for process networks: algorithm, analysis, and experiments on intel SCC.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems.
Proceedings of the 15th International Conference on Compilers, 2012

Power agnostic technique for efficient temperature estimation of multicore embedded systems.
Proceedings of the 15th International Conference on Compilers, 2012

2011
Worst-case temperature analysis for real-time systems.
Proceedings of the Design, Automation and Test in Europe, 2011

2009
Performance of Delay-Based Trojan Detection Techniques under Parameter Variations.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009

2008
Adaptation architectures cross levels.
Proceedings of the 2nd international workshop on Ultra-large-scale software-intensive systems, 2008


  Loading...