Derek Chiou

Orcid: 0009-0008-6762-4527

According to our database¹, Derek Chiou authored at least 73 papers between 1993 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

On csauthors.net:

Bibliography

2024

Primate: A Framework to Automatically Generate Soft Processors for Network Applications.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2024

SmartNIC-Enabled Live Migration for Storage-Optimized VMs.

[BibT_eX]

[DOI]

Natalie Enright Jerger

Derek Chiou

Peng Cheng

Yongqiang Xiong

Proceedings of the 15th ACM SIGOPS Asia-Pacific Workshop on Systems, 2024

2023

System Aspects of Deploying FPGAs for Cloud Infrastructure.

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2021

Specializing FGPU for Persistent Deep Learning.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2021

FlexScore: Quantifying Flexibility.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2021

DO-GPU: Domain Optimizable Soft GPUs.

[BibT_eX]

[DOI]

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2019

FlexSaaS: A Reconfigurable Accelerator for Web Search Selection.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2019

Dark Wires and the Opportunities for Reconfigurable Logic.

[BibT_eX]

[DOI]

Tian Tan

Eriko Nurvitadhi

Derek Chiou

IEEE Comput. Archit. Lett., 2019

Direct Universal Access: Making Data Center Resources Available to FPGA.

[BibT_eX]

[DOI]

Proceedings of the 16th USENIX Symposium on Networked Systems Design and Implementation, 2019

2018

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave.

[BibT_eX]

[DOI]

IEEE Micro, 2018

Azure Accelerated Networking: SmartNICs in the Public Cloud.

[BibT_eX]

[DOI]

Proceedings of the 15th USENIX Symposium on Networked Systems Design and Implementation, 2018

RAW 2018 Invited Talks.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Evaluating The Highly-Pipelined Intel Stratix 10 FPGA Architecture Using Open-Source Benchmarks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2018

Minnow: Lightweight Offload Engines for Worklist Management and Worklist-Directed Prefetching.

[BibT_eX]

[DOI]

Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

2017

FPGAs versus GPUs in Data centers.

[BibT_eX]

[DOI]

IEEE Micro, 2017

Configurable Clouds.

[BibT_eX]

[DOI]

IEEE Micro, 2017

Worklist-Directed Prefetching.

[BibT_eX]

[DOI]

Dan Zhang

Xiaoyu Ma

Derek Chiou

IEEE Comput. Archit. Lett., 2017

HGum: Messaging framework for hardware accelerators.

[BibT_eX]

[DOI]

Sizhuo Zhang

Hari Angepat

Derek Chiou

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

The microsoft catapult project.

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017

FPGA-Accelerated Transactional Execution of Graph Workloads.

[BibT_eX]

[DOI]

Xiaoyu Ma

Dan Zhang

Derek Chiou

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016

Introduction to Special Issue on Reconfigurable Components with Source Code.

[BibT_eX]

[DOI]

André DeHon

Derek Chiou

ACM Trans. Reconfigurable Technol. Syst., 2016

Impact of Future Technologies on Architecture.

[BibT_eX]

[DOI]

IEEE Micro, 2016

Proprietary versus Open Instruction Sets.

[BibT_eX]

[DOI]

IEEE Micro, 2016

A reconfigurable fabric for accelerating large-scale datacenter services.

[BibT_eX]

[DOI]

Commun. ACM, 2016

An interview with Yale Patt.

[BibT_eX]

[DOI]

Derek Chiou

Commun. ACM, 2016

A cloud-scale acceleration architecture.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Heterogeneous Computing and Infrastructure for Energy Efficiency in Microsoft Data Centers: Extended Abstract.

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

HGum: Messaging Framework for Hardware Accelerators (Abstact Only).

[BibT_eX]

[DOI]

Sizhuo Zhang

Hari Angepat

Derek Chiou

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

Intel Acquires Altera: How Will the World of FPGAs be Affected?

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

Agile Co-Design for a Reconfigurable Datacenter.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015

Guest Editorial: SBAC-PAD 2013.

[BibT_eX]

[DOI]

Int. J. Parallel Program., 2015

Keynote talk II: Accelerating data centers using reconfigurable logic.

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2015

GPGPU performance and power estimation using machine learning.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Growing a Healthy FPGA Ecosystem.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Accelerating data centers with reconfigurable logic.

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014

FPGA-Accelerated Simulation of Computer Systems

[BibT_eX]

[DOI]

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01744-5, 2014

An FPGA-based In-Line Accelerator for Memcached.

[BibT_eX]

[DOI]

Maysam Lavasani

Hari Angepat

Derek Chiou

IEEE Comput. Archit. Lett., 2014

Cryptoraptor: high throughput reconfigurable cryptographic processor.

[BibT_eX]

[DOI]

Gokhan Sayilar

Derek Chiou

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

2013

Hardware and Software Implementations of Prim's Algorithm for Efficient Minimum Spanning Tree Computation.

[BibT_eX]

[DOI]

Proceedings of the Embedded Systems: Design, Analysis and Verification, 2013

Implementing microprocessors from simplified descriptions.

[BibT_eX]

[DOI]

Nikhil A. Patil

Derek Chiou

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Compiling high throughput network processors.

[BibT_eX]

[DOI]

Maysam Lavasani

Larry Dennison

Derek Chiou

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

On the asymptotic costs of multiplexer-based reconfigurability.

[BibT_eX]

[DOI]

Johnathan York

Derek Chiou

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

MEMOCODE 2011 Hardware/Software CoDesign Contest: NoC simulator.

[BibT_eX]

[DOI]

Derek Chiou

Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

Enforcing architectural contracts in high-level synthesis.

[BibT_eX]

[DOI]

Nikhil A. Patil

Ankit Bansal

Derek Chiou

Proceedings of the 48th Design Automation Conference, 2011

2010

The Future of Architectural Simulation.

[BibT_eX]

[DOI]

IEEE Micro, 2010

Programming Multicores: Do Applications Programmers Need to Write Explicitly Parallel Programs?

[BibT_eX]

[DOI]

IEEE Micro, 2010

PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

NIFD: Non-intrusive FPGA Debugger -- Debugging FPGA 'Threads' for Rapid HW/SW Systems Prototyping.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

A Framework for Packet Selection and Reporting.

[BibT_eX]

[DOI]

Matthias Grossglauser

Jennifer Rexford

RFC, March, 2009

Accurate Functional-First Multicore Simulators.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2009

QUICK: A flexible full-system functional model.

[BibT_eX]

[DOI]

Dam Sunwoo

Joonsoo Kim

Derek Chiou

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

Soft connections: addressing the hardware-design modularity problem.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

2008

Parallelizing computer system simulators.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007

RAMP: Research Accelerator for Multiple Processors.

[BibT_eX]

[DOI]

Christoforos E. Kozyrakis

James C. Hoe

Derek Chiou

Krste Asanovic

IEEE Micro, 2007

Low-Power Design and Temperature Management.

[BibT_eX]

[DOI]

IEEE Micro, 2007

Where Does Security Stand? New Vulnerabilities vs. Trusted Computing.

[BibT_eX]

[DOI]

IEEE Micro, 2007

Reliability: Fallacy or Reality?

[BibT_eX]

[DOI]

IEEE Micro, 2007

Single-Threaded vs. Multithreaded: Where Should We Focus?

[BibT_eX]

[DOI]

IEEE Micro, 2007

Early Models for System-Level Power Estimation.

[BibT_eX]

[DOI]

Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators.

[BibT_eX]

[DOI]

Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

The FAST methodology for high-speed SoC/computer simulation.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

Research accelerator for multiple processors.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE Hot Chips 18 Symposium (HCS), 2006

2005

The Network Processing Forum switch fabric benchmark specifications: an overview.

[BibT_eX]

[DOI]

IEEE Netw., 2005

2003

Switch Fabric Interfaces.

[BibT_eX]

[DOI]

Itamar Elhanany

Kurt Busch

Derek Chiou

Computer, 2003

2000

Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards.

[BibT_eX]

[DOI]

Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), 2000

Application-specific memory management for embedded systems using software-controlled caches.

[BibT_eX]

[DOI]

Proceedings of the 37th Conference on Design Automation, 2000

1999

Extending the reach of microprocessors: column and curious caching.

[BibT_eX]

[DOI]

Derek Chiou

PhD thesis, 1999

1998

StarT-Voyager: A Flexible Platform for Exploring Scalable SMP Issues.

[BibT_eX]

[DOI]

Proceedings of the ACM/IEEE Conference on Supercomputing, 1998

Message passing support on StarT-Voyager.

[BibT_eX]

[DOI]

Proceedings of the 5th International Conference On High Performance Computing, 1998

The StarT-Voyager Parallel System.

[BibT_eX]

[DOI]

Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, 1998

1995

START-NG: Delivering Seamless Parallel Computing.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par '95 Parallel Processing, 1995

1993

Performance Visualization on Monsoon.

[BibT_eX]

[DOI]

Venkat Natarajan

Derek Chiou

Boon Seong Ang

J. Parallel Distributed Comput., 1993

Performance Studies of Id on the Monsoon Dataflow System.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 1993

Derek Chiou

Timeline

Legend:

Links

On csauthors.net:

Bibliography

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