Der-Yu Tsai

According to our database, Der-Yu Tsai authored at least 5 papers between 2019 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

This is SPATEM! A Spatial-Temporal Optimization Framework for Efficient Inference on ReRAM-based CNN Accelerator.

Yen-Ting Tsou, Kuan-Hsun Chen, Chia-Lin Yang, Hsiang-Yun Cheng, Jian-Jia Chen, Der-Yu Tsai

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design.

Samuel Liu, Jen-Ho Kuo, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, M.-H. Yang, Kai-Chiang Wu

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

Memory hot-zone and its application to accelerate the convergence of KSM for VM consolidation.

Chun-Yuan Huang, Der-Yu Tsai, Che-Rung Lee

Proceedings of the UCC '21: 2021 IEEE/ACM 14th International Conference on Utility and Cloud Computing, Leicester, United Kingdom, December 6 - 9, 2021, 2021

2020

Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator.

Shu-Ming Liu, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, Ming-Xue Yang, Kai-Chiang Wu

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

2019

ONNC: A Compilation Framework Connecting ONNX to Proprietary Deep Learning Accelerators.

Wei-Fen Lin, Der-Yu Tsai, Luba Tang, Cheng-Tao Hsieh, Cheng-Yi Chou, Ping-Hao Chang, Luis Hsu

Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019