Denis Teixeira Franco

Leomar Soares

Paulo Francisco Butzen

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults.

[BibT_eX]

[DOI]

Leomar S. da Rosa

Proceedings of the VLSI-SoC: New Technology Enabler, 2019

2018

Reliability evaluation of circuits designed in multi- and single-stage versions.

[BibT_eX]

[DOI]

Matheus F. Pontes

Cristina Meinhardt

Leomar S. da Rosa

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Probabilistic Method for Reliability Estimation of SP- Networks considering Single Event Transient Faults.

[BibT_eX]

[DOI]

Leomar S. da Rosa Jr.

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

The Suitability of the SPR-MP Method to Evaluate the Reliability of Logic Circuits.

[BibT_eX]

[DOI]

Matheus F. Pontes

Leomar S. da Rosa Jr.

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

Exploring BDDs to reduce test pattern set.

[BibT_eX]

[DOI]

Gabriel S. Porto

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

2016

Inserting permanent fault input dependence on PTM to improve robustness evaluation.

[BibT_eX]

[DOI]

Rafael B. Schivittz

Rafael Fritz

Cristina Meinhardt

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

A probabilistic model for stuck-on faults in combinational logic gates.

[BibT_eX]

[DOI]

Rafael B. Schivittz

Cristina Meinhardt

Leonardo Martins Rodrigues

Proceedings of the 17th Latin-American Test Symposium, 2016

2013

A system based on interval fuzzy approach to predict the appearance of pests in agriculture.

[BibT_eX]

[DOI]

Graçaliz Pereira Dimuro

Jose Carlos Fachinello

Proceedings of the Joint IFSA World Congress and NAFIPS Annual Meeting, 2013

2010

On evaluating the signal reliability of self-checking arithmetic circuits.

[BibT_eX]

[DOI]

Maí Correia Vasconcelos

Maí Correia R. de Vasconcelos

Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

2008

Relevant metrics for evaluation of concurrent error detection schemes.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2008

Signal probability for reliability evaluation of logic circuits.

[BibT_eX]

[DOI]

Maí Correia Vasconcelos

Maí Correia R. de Vasconcelos

Microelectron. Reliab., 2008

On the output events in concurrent error detection schemes.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Reliability analysis of logic circuits based on signal probability.

[BibT_eX]

[DOI]

Maí Correia Vasconcelos

Lirida Alves de Barros Naviner

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Methods and Metrics for Reliability Assessment.

[BibT_eX]

[DOI]

Maí Correia R. de Vasconcelos

Proceedings of the Fault-Tolerant Distributed Algorithms on VLSI Chips, 07.09., 2008

2006

Yield and reliability issues in nanoelectronic technologies.

[BibT_eX]

[DOI]

Ann. des Télécommunications, 2006

2003

Circuit-Level Considerations for Mixed-Signal Programmable Components.

[BibT_eX]

[DOI]

Adão Antônio de Souza Jr.

Marcelo Negreiros

Gabriel Parmegiani Jahn

IEEE Des. Test Comput., 2003

2000

FPGA Architecture Comparison for Non-Conventional Signal Processing.

[BibT_eX]

[DOI]

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

FPGA Based Systems with Linear and Non-Linear Signal Processing Capabilities.

[BibT_eX]

[DOI]

Proceedings of the 26th EUROMICRO 2000 Conference, 2000

Non-Linear Components for Mixed Circuits Analog Front-End.

[BibT_eX]

[DOI]

Adão Antônio de Souza Jr.

Marcelo Negreiros

Gabriel Parmegiani Jahn