Deepraj Soni
Orcid: 0000-0003-1732-088X
According to our database1,
Deepraj Soni
authored at least 14 papers
between 2019 and 2024.
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Bibliography
2024
Silicon-Proven ASIC Design for the Polynomial Operations of Fully Homomorphic Encryption.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024
2023
Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Postquantum Signature Schemes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
IACR Cryptol. ePrint Arch., 2023
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes.
CoRR, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
2021
Efficient Hardware Implementation of PQC Primitives and PQC algorithms Using High-Level Synthesis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition.
Proceedings of the Formal Methods in Computer Aided Design, 2021
2019
IACR Cryptol. ePrint Arch., 2019
Power, Area, Speed, and Security (PASS) Trade-Offs of NIST PQC Signature Candidates Using a C to ASIC Design Flow.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019