Deepak Mathaikutty

According to our database, Deepak Mathaikutty authored at least 49 papers between 2004 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

FlexNN: A Dataflow-aware Flexible Deep Learning Accelerator for Energy-Efficient Edge Devices.

Arnab Raha, Deepak A. Mathaikutty, Soumendu Kumar Ghosh, Shamik Kundu

CoRR, 2024

HARVEST: Towards Efficient Sparse DNN Accelerators using Programmable Thresholds.

Soumendu Kumar Ghosh, Shamik Kundu, Arnab Raha, Deepak A. Mathaikutty, Vijay Raghunathan

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

RASH: Reliable Deep Learning Acceleration using Sparsity-based Hardware.

Shamik Kundu, Arnab Raha, Deepak A. Mathaikutty, Kanad Basu

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

SwiSS: Switchable Single-Sided Sparsity-based DNN Accelerators.

Shamik Kundu, Soumendu Kumar Ghosh, Arnab Raha, Deepak A. Mathaikutty

Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

2023

VPU-EM: An Event-based Modeling Framework to Evaluate NPU Performance and Power Efficiency at Scale.

Charles Qi, Yi Wang, Hui Wang, Yang Lu, Shiva Shankar Subramanian, Finola Cahill, Conall Tuohy, Victor Li, Xu Qian, Darren Crews, Ling Wang, Shivaji Roy, Andrea Deidda, Martin Power, Niall Hanrahan, Rick Richmond, Umer Cheema, Arnab Raha, Alessandro Palla, Gary Baugh, Deepak Mathaikutty

CoRR, 2023

Wireless-Assisted Automatic Online Spatial Calibration based on 5G TSN for Sensor Fusion.

Ming Lei, Mahib Rahman, Deepak Mathaikutty, Ignacio Alvarez

Proceedings of the IEEE International Conference on Signal Processing, 2023

2022

2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators.

Steven Hsu, Amit Agarwal, Mark A. Anders, Arnab Raha, Raymond Sung, Deepak Mathaikutty, Ram Krishnamurthy, James W. Tschanz, Vivek De

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

Design Considerations for Edge Neural Network Accelerators: An Industry Perspective.

Arnab Raha, Sang Kyun Kim, Deepak Mathaikutty, Guruguhanathan Venkataramanan, Debabrata Mohapatra, Raymond Sung, Cormac Brick, Gautham N. Chinya

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Special Session: Approximate TinyML Systems: Full System Approximations for Extreme Energy-Efficiency in Intelligent Edge Devices.

Arnab Raha, Soumendu Kumar Ghosh, Debabrata Mohapatra, Deepak A. Mathaikutty, Raymond Sung, Cormac Brick, Vijay Raghunathan

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2019

An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ Optimization.

Pascal Andreas Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Xiang Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De

IEEE J. Solid State Circuits, 2019

2018

Loihi: A Neuromorphic Manycore Processor with On-Chip Learning.

Mike Davies, Narayan Srinivasa, Tsung-Han Lin, Gautham N. Chinya, Yongqiang Cao, Sri Harsha Choday, Georgios D. Dimou, Prasad Joshi, Nabil Imam, Shweta Jain, Yuyun Liao, Chit-Kwan Lin, Andrew Lines, Ruokun Liu, Deepak Mathaikutty, Steven McCoy, Arnab Paul, Jonathan Tse, Guruguhanathan Venkataramanan, Yi-Hsin Weng, Andreas Wild, Yoonseok Yang, Hong Wang

IEEE Micro, 2018

An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS.

Pascal Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Chris Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2009

<i>SCoPE</i>: Statistical Regression Based Power Models for Co-Processors Power Estimation.

Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla

J. Low Power Electron., 2009

Metamodeling: An Emerging Representation Paradigm for System-Level Design.

Alberto L. Sangiovanni-Vincentelli, Sandeep K. Shukla, Janos Sztipanovits, Guang Yang, Deepak Mathaikutty

IEEE Des. Test Comput., 2009

Accurate power estimation of hardware co-processors using system level simulation.

Sumit Ahuja, Deepak Mathaikutty, Avinash Lakshminarayana, Sandeep K. Shukla

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Power estimation methodology for a high-level synthesis framework.

Sumit Ahuja, Deepak Mathaikutty, Gaurav Singh, Joe Stetzer, Sandeep K. Shukla, Ajit Dingankar

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design.

Deepak Mathaikutty, Sandeep Kumar Shukla

Artech House, ISBN: 978-1-59693-424-5, 2009

2008

A Trace-Based Framework for Verifiable GALS Composition of IPs.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla

IEEE Trans. Very Large Scale Integr. Syst., 2008

MCF: A Metamodeling-Based Component Composition Framework - Composing SystemC IPs for Executable System Models.

Deepak Mathaikutty, Sandeep K. Shukla

IEEE Trans. Very Large Scale Integr. Syst., 2008

MMV: A Metamodeling Based Microprocessor Validation Environment.

Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja

IEEE Trans. Very Large Scale Integr. Syst., 2008

Mining metadata for composability of IPs from SystemC IP library.

Deepak Mathaikutty, Sandeep K. Shukla

Des. Autom. Embed. Syst., 2008

SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system.

Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch

Des. Autom. Embed. Syst., 2008

Applying Verification Collaterals for Accurate Power Estimation.

Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Ninth International Workshop on Microprocessor Test and Verification, 2008

Formal Transformation of a KPN Specification to a GALS Implementation.

Syed Suhaib, Bijoy Antony Jose, Sandeep K. Shukla, Deepak Mathaikutty

Proceedings of the Forum on specification and Design Languages, 2008

2007

Metamodeling Driven IP Reuse for System-on-chip Integration and Microprocessor Design.

Deepak Mathaikutty

PhD thesis, 2007

EWD: A metamodeling driven customizable multi-MoC system modeling framework.

Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch

ACM Trans. Design Autom. Electr. Syst., 2007

Dataflow Architectures for GALS.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Third International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design, 2007

Model Based Test Generation for Microprocessor Architecture Validation.

Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Assertion-Based Modal Power Estimation.

Sumit Ahuja, Deepak Mathaikutty, Sandeep K. Shukla, Ajit Dingankar

Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

Type Inference for IP Composition.

Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

Model-driven test generation for system level validation.

Deepak Mathaikutty, Sumit Ahuja, Ajit Dingankar, Sandeep K. Shukla

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2007

A Metamodeling based Framework for Architectural Modeling and Simulator Generation.

Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla

Proceedings of the Forum on specification and Design Languages, 2007

Design fault directed test generation for microprocessor validation.

Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

CARH: service-oriented architecture for validating system-level designs.

Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Validating Families of Latency Insensitive Protocols.

Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep K. Shukla

IEEE Trans. Computers, 2006

A Trace Based Framework for Validation of SoC Designs with GALS Systems.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

SoC Design Space Exploration through Automated IP Selection from SystemC IP Library.

Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Polychronous Methodology For System Design: A True Concurrency Approach.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, Jean-Pierre Talpin

Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

MMV: Metamodeling Based Microprocessor Valiation Environment.

Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja

Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

MCF: A Metamodeling-based Visual Component Composition Framework.

Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Forum on specification and Design Languages, 2006

2005

XFM: An incremental methodology for developing formal models.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner

ACM Trans. Design Autom. Electr. Syst., 2005

A Functional Programming Framework for Latency Insensitive Protocol Validation.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin

Proceedings of the Second Workshop on Globally Asynchronous, Locally Synchronous Design, 2005

System Level Design Methodology for System On Chips using Multi-Threaded Graphs.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Automated Extraction of Structural Information from SystemC-based IP for Validation.

David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), 2005

Modelling Environment for Heterogeneous Systems based on MoCs.

Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch

Proceedings of the Forum on specification and Design Languages, 2005

SystemCXML: An Exstensible SystemC Front end Using XML.

David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Forum on specification and Design Languages, 2005

2004

Extreme Formal Modeling (XFM) for Hardware Models.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner

Proceedings of the Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), 2004

Effects of property ordering in an incremental formal modeling methodology.

Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla

Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

A Functional Programming Framework of Heterogeneous Model of Computation for System Design.

Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla

Proceedings of the Forum on specification and Design Languages, 2004