Deepak D. Sherlekar

According to our database, Deepak D. Sherlekar authored at least 6 papers between 1985 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Late Breaking Results: On the One-Key Premise of Logic Locking.

Yinghua Hu, Hari Cherupalli, Mike Borza, Deepak D. Sherlekar

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2004

Design considerations for regular fabrics.

Deepak D. Sherlekar

Proceedings of the 2004 International Symposium on Physical Design, 2004

1996

Design planning for high-performance ASICs.

John Y. Sayah, Rajesh Gupta, Deepak D. Sherlekar, Philip S. Honsinger, Jitendra M. Apte, S. Wayne Bollinger, Hai Hsia Chen, Sumit DasGupta, Edward P. Hsieh, Andrew D. Huber, Edward J. Hughes, Zahi M. Kurzum, Vasant B. Rao, Thepthai Tabtieng, Vigen Valijan, David Y. Yang

IBM J. Res. Dev., 1996

1990

Optimality of Gauge and Degree-Sensitive VLSI Layouts of Planar Graphs.

Deepak D. Sherlekar

Proceedings of the Advances in Computing and Information, 1990

1988

Input Sensitive VLSI Layouts for Graphs of Arbitrary Degree.

Deepak D. Sherlekar, Joseph F. JáJá

Proceedings of the VLSI Algorithms and Architectures, 3rd Aegean Workshop on Computing, 1988

1985

O(1) Parallel Time Incremental Graph Algorithms.

Deepak D. Sherlekar, Shaunak Pawagi, I. V. Ramakrishnan

Proceedings of the Foundations of Software Technology and Theoretical Computer Science, 1985