Debjyoti Bhattacharjee

According to our database, Debjyoti Bhattacharjee authored at least 50 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

SAfEPaTh: A System-Level Approach for Efficient Power and Thermal Estimation of Convolutional Neural Network Accelerator.

Yukai Chen, Simei Yang, Debjyoti Bhattacharjee, Francky Catthoor, Arindam Mallik

CoRR, 2024

Full-stack evaluation of Machine Learning inference workloads for RISC-V systems.

Debjyoti Bhattacharjee, Anmol, Tommaso Marinelli, Karan Pathak, Peter Kourzanov

CoRR, 2024

Adaptive Block-Scaled GeMMs on Vector Processors for DNN Training at the Edge.

Nitish Satya Murthy, Nathan Laubeuf, Debjyoti Bhattacharjee, Francky Catthoor, Marian Verhelst

Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

Multi-Level Analysis of GPU Utilization in ML Training Workloads.

Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Analyzing GPU Energy Consumption in Data Movement and Storage.

Paul Delestrac, Jonathan Miquel, Debjyoti Bhattacharjee, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo

Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024

2023

Improved Linear Decomposition of Majority and Threshold Boolean Functions.

Anupam Chattopadhyay, Debjyoti Bhattacharjee, Subhamoy Maitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge.

Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

IEEE J. Solid State Circuits, 2023

AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference.

Iman Dadras, Giuseppe Maria Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, Arindam Mallik

IEEE Access, 2023

Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis.

Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration.

Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins

ACM Trans. Design Autom. Electr. Syst., 2022

AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators.

Simei Yang, Debjyoti Bhattacharjee, Vinay B. Y. Kumar, Saikat Chatterjee, Sayandip De, Peter Debacker, Diederik Verkest, Arindam Mallik, Francky Catthoor

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC.

Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation.

Michele Caselli, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

In-memory realization of SHA-2 using ReVAMP architecture.

Debjyoti Bhattacharjee, Anirban Majumder, Anupam Chattopadhyay

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration.

Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Perspectives on Emerging Computation-in-Memory Paradigms.

Shubham Rai, Mengyun Liu, Anteneh Gebregiorgis, Debjyoti Bhattacharjee, Krishnendu Chakrabarty, Said Hamdioui, Anupam Chattopadhyay, Jens Trommer, Akash Kumar

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.

Rotem Ben Hur, Ronny Ronen, Ameer Haj Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, Shahar Kvatinsky

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing.

Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay

IEEE Trans. Computers, 2020

Efficient Quantum Circuits for Square-Root and Inverse Square-Root.

Srijit Dutta, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit.

Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

New techniques for fault-tolerant decomposition of Multi-Controlled Toffoli gate.

Laxmidhar Biswal, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Hafizur Rahaman

CoRR, 2019

Accelerating Binary-Matrix Multiplication on FPGA.

Debjyoti Bhattacharjee, Anupam Chattopadhyay, Ricardo Jack Liwongan

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis.

Debjyoti Bhattacharjee, Mathias Soeken, Srijit Dutta, Anupam Chattopadhyay, Giovanni De Micheli

Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019

MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper.

Debjyoti Bhattacharjee, Abdullah Ash-Saki, Mahabubul Alam, Anupam Chattopadhyay, Swaroop Ghosh

Proceedings of the International Conference on Computer-Aided Design, 2019

SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars.

Valerio Tenace, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Andrea Calimera

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Architectures and automation for beyond-CMOS technologies

Debjyoti Bhattacharjee

PhD thesis, 2018

Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays.

Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay

ACM J. Emerg. Technol. Comput. Syst., 2018

Quantum Circuits for Toom-Cook Multiplication.

Srijit Dutta, Debjyoti Bhattacharjee, Anupam Chattopadhyay

CoRR, 2018

Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture.

Tarun Vatwani, Arko Dutt, Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code.

Swagata Mandal, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018

ReRAM-based In-Memory Computation of Galois Field arithmetic.

Swagata Mandal, Debjyoti Bhattacharjee, Yaswanth Tavva, Anupam Chattopadhyay

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Synthesis, Technology Mapping and Optimization for Emerging Technologies.

Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Synthesis of Multi-valued Literal Using Lukasiewicz Logic.

Anmol Prakash Surhonne, Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

Technology-aware logic synthesis for ReRAM based in-memory computing.

Debjyoti Bhattacharjee, Luca G. Amarù, Anupam Chattopadhyay

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array.

Debjyoti Bhattacharjee, Arko Dutt, Anupam Chattopadhyay

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017

Efficient complementary resistive switch-based crossbar array Booth multiplier.

Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Anupam Chattopadhyay

Microelectron. J., 2017

Depth-Optimal Quantum Circuit Placement for Arbitrary Topologies.

Debjyoti Bhattacharjee, Anupam Chattopadhyay

CoRR, 2017

Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar Arrays.

Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

SHA-3 implementation using ReRAM based in-memory computing architecture.

Debjyoti Bhattacharjee, Vikramkumar Pudi, Anupam Chattopadhyay

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

ReVAMP: ReRAM based VLIW architecture for in-memory computing.

Debjyoti Bhattacharjee, Rajeswari Devadoss, Anupam Chattopadhyay

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Area-constrained technology mapping for in-memory computing using ReRAM devices.

Debjyoti Bhattacharjee, Arvind Easwaran, Anupam Chattopadhyay

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Enabling in-memory computation of binary BLAS using ReRAM crossbar arrays.

Debjyoti Bhattacharjee, Farhad Merchant, Anupam Chattopadhyay

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Hardware Accelerator for Stream Cipher Spritz.

Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 13th International Joint Conference on e-Business and Telecommunications (ICETE 2016), 2016

Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays.

Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay

Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Delay-optimal technology mapping for in-memory computing using ReRAM devices.

Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Ensemble Classifier based approach for Code-Mixed Cross-Script Question Classification.

Debjyoti Bhattacharjee, Paheli Bhattacharya

Proceedings of the Working notes of FIRE 2016, 2016

EAST: Efficient Assertion Simulation techniques.

Debjyoti Bhattacharjee, Soumi Chattopadhyay, Ansuman Banerjee

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Comparison Between an HVS Inspired Linear Filter and the Bilateral Filter in Performing "Vision at a Glance" through Smoothing with Edge Preservation.

Debjyoti Bhattacharjee, Ashish Bakshi, Kuntal Ghosh

Int. J. Image Graph., 2015

EvoDeb: Debugging Evolving Hardware Designs.

Debjyoti Bhattacharjee, Ansuman Banerjee, Anupam Chattopadhyay

Proceedings of the 28th International Conference on VLSI Design, 2015

2014

Efficient Hardware Accelerator for AEGIS-128 Authenticated Encryption.

Debjyoti Bhattacharjee, Anupam Chattopadhyay

Proceedings of the Information Security and Cryptology - 10th International Conference, 2014