Debdut Biswas

According to our database¹, Debdut Biswas authored at least 4 papers between 2019 and 2024.

Collaborative distances:

Timeline

Book

In proceedings

Article

PhD thesis

Dataset

Other

2024

A reference sampling ΔΣ subsampling PLL.

[BibT_eX]

[DOI]

Integr., 2024

2022

Spur Reduction Circuit for Fractional-N PLLs.

[BibT_eX]

[DOI]

Circuits Syst. Signal Process., 2022

2019

Spur reduction architecture for multiphase fractional PLLs.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2019

A Model of Spurs for Delta-Sigma Fractional PLLs.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019