Debajit Basak
Orcid: 0000-0003-1991-2803
According to our database1,
Debajit Basak
authored at least 11 papers
between 2016 and 2024.
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Bibliography
2024
An Efficient 1.4-GS/s 10-bit Timing-Skew-Free Time-Interleaved SAR ADC With a Centralized Sampling Frontend.
IEEE Trans. Very Large Scale Integr. Syst., July, 2024
2021
A 0.59-mW 78.7-dB SNDR 2-MHz Bandwidth Active-RC Delta-Sigma Modulator With Relaxed and Reduced Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators.
IEEE Access, 2019
2018
Improving Power Efficiency for Active-RC Delta-Sigma Modulators Using a Passive-RC Low-Pass Filter in the Feedback.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Proceedings of the International SoC Design Conference, 2017
2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Gm-cell nonlinearity compensation technique using single-bit quantiser and FIR DAC in Gm-C based delta-sigma modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016