Debabrata Mohapatra

According to our database, Debabrata Mohapatra authored at least 20 papers between 2007 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse.

Hyoukjun Kwon, Krishnakumar Nair, Jamin Seo, Jason Yik, Debabrata Mohapatra, Dongyuan Zhan, Jinook Song, Peter Capak, Peizhao Zhang, Peter Vajda, Colby R. Banbury, Mark Mazumder, Liangzhen Lai, Ashish Sirasao, Tushar Krishna, Harshit Khaitan, Vikas Chandra, Vijay Janapa Reddi

Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

2021

Design Considerations for Edge Neural Network Accelerators: An Industry Perspective.

Arnab Raha, Sang Kyun Kim, Deepak Mathaikutty, Guruguhanathan Venkataramanan, Debabrata Mohapatra, Raymond Sung, Cormac Brick, Gautham N. Chinya

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Special Session: Approximate TinyML Systems: Full System Approximations for Extreme Energy-Efficiency in Intelligent Edge Devices.

Arnab Raha, Soumendu Kumar Ghosh, Debabrata Mohapatra, Deepak A. Mathaikutty, Raymond Sung, Cormac Brick, Vijay Raghunathan

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2014

Scalable Effort Hardware Design.

Vinay Kumar Chippa, Debabrata Mohapatra, Kaushik Roy, Srimat T. Chakradhar, Anand Raghunathan

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

Low-Power Digital Signal Processing Using Approximate Adders.

Vaibhav Gupta, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core.

Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

Energy-efficient recognition and mining processor using scalable effort design.

Vinay K. Chippa, Hrishikesh Jayakumar, Debabrata Mohapatra, Kaushik Roy, Anand Raghunathan

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Logic and Memory Design Based on Unequal Error Protection for Voltage-scalable, Robust and Adaptive DSP Systems.

Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy

J. Signal Process. Syst., 2012

Empirical Evidence Against CAPM: Relating Alphas and Returns to Betas.

Mayur Agrawal, Debabrata Mohapatra, Ilya Pollak

IEEE J. Sel. Top. Signal Process., 2012

2011

A Priority-Based 6T/8T Hybrid SRAM Architecture for Aggressive Voltage Scaling in Video Applications.

Ik Joon Chang, Debabrata Mohapatra, Kaushik Roy

IEEE Trans. Circuits Syst. Video Technol., 2011

IMPACT: imprecise adders for low-power approximate computing.

Vaibhav Gupta, Debabrata Mohapatra, Sang Phill Park, Anand Raghunathan, Kaushik Roy

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Design of voltage-scalable meta-functions for approximate computing.

Debabrata Mohapatra, Vinay K. Chippa, Anand Raghunathan, Kaushik Roy

Proceedings of the Design, Automation and Test in Europe, 2011

Variation-tolerant and self-repair design methodology for low temperature polycrystalline silicon liquid crystal and organic light emitting diode displays.

Chih-Hsiang Ho, Chao Lu, Debabrata Mohapatra, Kaushik Roy

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Voltage Scalable High-Speed Robust Hybrid Arithmetic Units Using Adaptive Clocking.

Swaroop Ghosh, Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2010

VEDA: Variation-aware energy-efficient Discrete Wavelet Transform architecture.

Vaibhav Gupta, Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy

Proceedings of the 28th International Conference on Computer Design, 2010

Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency.

Vinay K. Chippa, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Srimat T. Chakradhar

Proceedings of the 47th Design Automation Conference, 2010

2009

System level DSP synthesis using voltage overscaling, unequal error protection & adaptive quality tuning.

Georgios Karakonstantis, Debabrata Mohapatra, Kaushik Roy

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator.

Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors.

Ik Joon Chang, Debabrata Mohapatra, Kaushik Roy

Proceedings of the 46th Design Automation Conference, 2009

2007

Low-power process-variation tolerant arithmetic units using input-based elastic clocking.

Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007