Dawit Burusie Abdi

Orcid: 0000-0002-3598-8798

According to our database1, Dawit Burusie Abdi authored at least 8 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2021
2022
2023
2024
0
1
2
3
4
5
1
1
2
3
1

Legend:

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Links

On csauthors.net:

Bibliography

2024
Ultra-Scaled E-Tree-Based SRAM Design and Optimization With Interconnect Focus.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024

Thermal Considerations for Block-Level PPA Assessment in Angstrom Era: A Comparison Study of Nanosheet FETs (A10) & Complementary FETs (A5).
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

On-chip Memory in Accelerator-based Systems: A System Technology Co-Optimization (STCO) Perspective for Emerging Device Technologies.
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

Thermal Performance Evaluation of Multi-Core SOCs Using Power-Thermal Co-Simulation.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
3D SRAM Macro Design in 3D Nanofabric Process Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs).
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2021
Drain Induced Barrier Widening and Reverse Short Channel Effects in Tunneling FETs: Investigation and Analysis.
IEEE Access, 2021

Effect of Drain Induced Barrier Enhancement on Subthreshold Swing and OFF-State Current of Short Channel MOSFETs: A TCAD Study.
IEEE Access, 2021


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