Dawei Ye
Orcid: 0000-0002-1963-149X
According to our database1,
Dawei Ye
authored at least 20 papers
between 2011 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Echo State Network-Enabled Intelligent Smart Sensor Design for Creating a Robotic Nervous System.
Int. J. Pattern Recognit. Artif. Intell., June, 2023
2022
Analysis and Design of Digital Injection-Locked Clock Multipliers Using Bang-Bang Phase Detectors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Erratum to "A Nonlinear Receiver Leveraging Cascaded Inverter-Based Envelope-Biased LNAs for In-Band Interference Suppression in the Amplitude Domain".
IEEE J. Solid State Circuits, 2022
A 2.0-2.9 GHz ring-based injection-locked clock multiplier using a self-alignment frequency-tracking loop for reference spur reduction.
Integr., 2022
A 0.021mm<sup>2</sup> 65nm CMOS 2.5GHz Digital Injection-Locked Clock Multiplier with Injection Pulse Shaping Achieving -79dBc Reference Spur and 0.496mW/GHz Power Efficiency.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
A Nonlinear Receiver Leveraging Cascaded Inverter-Based Envelope-Biased LNAs for In-Band Interference Suppression in the Amplitude Domain.
IEEE J. Solid State Circuits, 2021
An 8-Channel Analog Front-End with a PVT-lnsensitive Switched-Capacitor and Analog Combo DC Servo Loop Achieving 300mV Tolerance and 0.64s Recovery Time to Electrode-DC Offset for Physiological Signal Recording.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
A Two-Tone Wake-Up Receiver with an Envelope-Detector-First Architecture Using Envelope Biasing and Active Inductor Load Achieving 41/33dB In-Band Rejection to CW/AM Interference.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
A Fully-Integrated 64-Channel Wireless Neural Interfacing SoC Achieving 110 dB AFE PSRR and Supporting 54 Mb/s Symbol Rate, Meter-Range Wireless Data Transmission.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
A 340 nW/Channel 110 dB PSRR Neural Recording Analog Front-End Using Replica-Biasing LNA, Level-Shifter Assisted PGA, and Averaged LFP Servo Loop in 65 nm CMOS.
IEEE Trans. Biomed. Circuits Syst., 2020
A Wireless Power and Data Transfer Receiver Achieving 75.4% Effective Power Conversion Efficiency and Supporting 0.1% Modulation Depth for ASK Demodulation.
IEEE J. Solid State Circuits, 2020
A 400 MHz, 8-Bit, 1.75-ps Resolution Pipelined-Two-Step Time-to-Digital Converter with Dynamic Time Amplification.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 2.4GHz 65nm CMOS Mixer-First Receiver Using 4-Stage Cascaded Inverter-Based Envelope-Biased LNAs Achieving 66dB In-Band Interference Tolerance and -83dBm Sensitivity.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 2.46GHz, -88dBm Sensitivity CMOS Passive Mixer-First Nonlinear Receiver with >50dB Tolerance to In-Band Interferer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A 340nW/Channel Neural Recording Analog Front-End using Replica-Biasing LNAs to Tolerate 200mVpp Interfere from 350mV Power Supply.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
A 13.56MHz Wireless Power and Data Transfer Receiver Achieving 75.4% Effective-Power-Conversion Efficiency with 0.1% ASK Modulation Depth and 9.2mW Output Power.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2016
A 915 MHz 175 µW Receiver Using Transmitted-Reference and Shifted Limiters for 50 dB In-Band Interference Tolerance.
IEEE J. Solid State Circuits, 2016
26.2 An Ultra-Low-Power receiver using transmitted-reference and shifted limiters for in-band interference resilience.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2013
A wide bandwidth fractional-N synthesizer for LTE with phase noise cancellation using a hybrid-ΔΣ-DAC and charge re-timing.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2011
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011