Davit Babayan

According to our database1, Davit Babayan authored at least 4 papers between 2015 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
Low power OpenRISC processor with power gating, multi-VTH and multi-voltage techniques.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

1.9 GHz 1.05V 16-bit RISC core for high density and low power operation in 28nm technology.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015
Accurate reference current generation method and circuit in CMOS.
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

Clock gating and multi-VTH low power design methods based on 32/28 nm ORCA processor.
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015


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